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comparison packages/kernel/current/src/common/clock.cxx @ 66:bf00f99aec69 ecos-sw-2000-02-02

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Merge from eCos master repository on 2000-02-02-19:16:44-GMT
author jlarmour
date Wed, 02 Feb 2000 19:57:02 +0000
parents c38311975d4f
children 59d97b6ba612
comparison
equal deleted inserted replaced
65:b4822dd69c33 66:bf00f99aec69
7 //========================================================================== 7 //==========================================================================
8 //####COPYRIGHTBEGIN#### 8 //####COPYRIGHTBEGIN####
9 // 9 //
10 // ------------------------------------------- 10 // -------------------------------------------
11 // The contents of this file are subject to the Red Hat eCos Public License 11 // The contents of this file are subject to the Red Hat eCos Public License
12 // Version 1.0 (the "License"); you may not use this file except in 12 // Version 1.1 (the "License"); you may not use this file except in
13 // compliance with the License. You may obtain a copy of the License at 13 // compliance with the License. You may obtain a copy of the License at
14 // http://sourceware.cygnus.com/ecos 14 // http://www.redhat.com/
15 // 15 //
16 // Software distributed under the License is distributed on an 16 // Software distributed under the License is distributed on an "AS IS"
17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the 17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
18 // License for the specific language governing rights and limitations under 18 // License for the specific language governing rights and limitations under
19 // the License. 19 // the License.
20 // 20 //
21 // The Original Code is eCos - Embedded Configurable Operating System, 21 // The Original Code is eCos - Embedded Configurable Operating System,
836 836
837 #if defined(CYGVAR_KERNEL_COUNTERS_CLOCK_DSR_LATENCY) 837 #if defined(CYGVAR_KERNEL_COUNTERS_CLOCK_DSR_LATENCY)
838 cyg_tick_count total_clock_dsr_latency, total_clock_dsr_calls; 838 cyg_tick_count total_clock_dsr_latency, total_clock_dsr_calls;
839 cyg_int32 min_clock_dsr_latency = 0x7FFFFFFF; 839 cyg_int32 min_clock_dsr_latency = 0x7FFFFFFF;
840 cyg_int32 max_clock_dsr_latency = 0; 840 cyg_int32 max_clock_dsr_latency = 0;
841 cyg_int32 clock_dsr_start = 0; 841 cyg_uint32 clock_dsr_start = 0;
842 #endif 842 #endif
843 843
844 // ------------------------------------------------------------------------- 844 // -------------------------------------------------------------------------
845 845
846 cyg_uint32 Cyg_RealTimeClock::isr(cyg_vector vector, CYG_ADDRWORD data) 846 cyg_uint32 Cyg_RealTimeClock::isr(cyg_vector vector, CYG_ADDRWORD data)
880 { 880 {
881 // CYG_REPORT_FUNCTION(); 881 // CYG_REPORT_FUNCTION();
882 882
883 #if defined(CYGVAR_KERNEL_COUNTERS_CLOCK_DSR_LATENCY) 883 #if defined(CYGVAR_KERNEL_COUNTERS_CLOCK_DSR_LATENCY)
884 if (measure_clock_latency) { 884 if (measure_clock_latency) {
885 cyg_int32 delta; 885 cyg_uint32 delta;
886 HAL_CLOCK_READ(&delta); 886 HAL_CLOCK_READ(&delta);
887 delta -= clock_dsr_start; 887 delta -= clock_dsr_start;
888 // Note: Ignore a latency of <= 0 when finding min_clock_latency. 888 // Note: Ignore a latency of <= 0 when finding min_clock_latency.
889 if (delta > 0 ) { 889 if (delta > 0 ) {
890 // Valid delta measured 890 // Valid delta measured