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1 /*================================================================= |
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2 // |
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3 // cache.c |
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4 // |
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5 // HAL Cache timing test |
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6 // |
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7 //========================================================================== |
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8 //####COPYRIGHTBEGIN#### |
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9 // |
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10 // ------------------------------------------- |
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11 // The contents of this file are subject to the Cygnus eCos Public License |
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12 // Version 1.0 (the "License"); you may not use this file except in |
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13 // compliance with the License. You may obtain a copy of the License at |
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14 // http://sourceware.cygnus.com/ecos |
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15 // |
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16 // Software distributed under the License is distributed on an "AS IS" |
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17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the |
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18 // License for the specific language governing rights and limitations under |
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19 // the License. |
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20 // |
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21 // The Original Code is eCos - Embedded Cygnus Operating System, released |
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22 // September 30, 1998. |
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23 // |
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24 // The Initial Developer of the Original Code is Cygnus. Portions created |
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25 // by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. |
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26 // ------------------------------------------- |
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27 // |
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28 //####COPYRIGHTEND#### |
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29 //========================================================================== |
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30 //#####DESCRIPTIONBEGIN#### |
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31 // |
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32 // Author(s): dsm |
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33 // Contributors: dsm, nickg |
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34 // Date: 1998-06-18 |
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35 //####DESCRIPTIONEND#### |
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36 */ |
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37 |
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38 #include <pkgconf/hal.h> |
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39 |
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40 #include <cyg/infra/testcase.h> |
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41 |
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42 #include <cyg/hal/hal_cache.h> |
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43 #include <cyg/hal/hal_intr.h> |
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44 |
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45 // ------------------------------------------------------------------------- |
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46 // If the HAL does not supply this, we supply our own version |
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47 |
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48 #ifndef HAL_DCACHE_PURGE_ALL |
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49 |
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50 static cyg_uint8 dca[HAL_DCACHE_SIZE + HAL_DCACHE_LINE_SIZE*2]; |
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51 |
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52 #define HAL_DCACHE_PURGE_ALL() \ |
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53 CYG_MACRO_START \ |
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54 volatile cyg_uint8 *addr = &dca[HAL_DCACHE_LINE_SIZE]; \ |
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55 volatile cyg_uint8 tmp = 0; \ |
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56 int i; \ |
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57 for( i = 0; i < HAL_DCACHE_SIZE; i += HAL_DCACHE_LINE_SIZE ) \ |
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58 { \ |
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59 tmp = addr[i]; \ |
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60 } \ |
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61 CYG_MACRO_END |
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62 |
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63 #endif |
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64 |
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65 // ------------------------------------------------------------------------- |
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66 |
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67 #define MAXSIZE 1<<18 |
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68 |
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69 volatile char m[MAXSIZE]; |
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70 |
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71 #ifndef MAX_STRIDE |
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72 #define MAX_STRIDE 64 |
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73 #endif |
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74 |
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75 // ------------------------------------------------------------------------- |
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76 |
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77 static void time0(register cyg_uint32 stride) |
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78 { |
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79 register cyg_uint32 j,k; |
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80 // cyg_tick_count_t count0, count1; |
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81 // cyg_ucount32 t; |
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82 register char c; |
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83 |
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84 // count0 = current_time(); |
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85 k = 0; |
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86 if ( cyg_test_is_simulator ) |
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87 k = 3960; |
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88 |
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89 for(; k<4000;k++) { |
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90 for(j=0; j<(HAL_DCACHE_SIZE/HAL_DCACHE_LINE_SIZE); j++) { |
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91 c=m[stride*j]; |
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92 } |
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93 } |
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94 |
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95 // count1 = current_time(); |
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96 // t = count1 - count0; |
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97 // diag_printf("stride=%d, time=%d\n", stride, t); |
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98 } |
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99 |
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100 // ------------------------------------------------------------------------- |
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101 |
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102 void time1(void) |
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103 { |
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104 cyg_uint32 i; |
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105 |
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106 for(i=1; i<=MAX_STRIDE; i+=i) { |
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107 time0(i); |
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108 } |
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109 } |
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110 |
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111 // ------------------------------------------------------------------------- |
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112 // This test could be improved by counting number of passes possible |
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113 // in a given number of ticks. |
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114 |
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115 static void entry0( void ) |
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116 { |
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117 register CYG_INTERRUPT_STATE oldints; |
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118 |
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119 HAL_DISABLE_INTERRUPTS(oldints); |
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120 HAL_DCACHE_PURGE_ALL(); |
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121 HAL_ICACHE_INVALIDATE_ALL(); |
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122 HAL_DCACHE_INVALIDATE_ALL(); |
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123 HAL_ICACHE_DISABLE(); |
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124 HAL_DCACHE_DISABLE(); |
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125 HAL_RESTORE_INTERRUPTS(oldints); |
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126 CYG_TEST_INFO("Dcache off Icache off"); |
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127 time1(); |
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128 |
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129 HAL_DISABLE_INTERRUPTS(oldints); |
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130 HAL_DCACHE_PURGE_ALL(); |
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131 HAL_ICACHE_INVALIDATE_ALL(); |
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132 HAL_DCACHE_INVALIDATE_ALL(); |
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133 HAL_ICACHE_DISABLE(); |
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134 HAL_DCACHE_ENABLE(); |
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135 HAL_RESTORE_INTERRUPTS(oldints); |
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136 CYG_TEST_INFO("Dcache on Icache off"); |
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137 time1(); |
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138 |
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139 HAL_DISABLE_INTERRUPTS(oldints); |
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140 HAL_DCACHE_PURGE_ALL(); |
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141 HAL_ICACHE_INVALIDATE_ALL(); |
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142 HAL_DCACHE_INVALIDATE_ALL(); |
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143 HAL_ICACHE_ENABLE(); |
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144 HAL_DCACHE_DISABLE(); |
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145 HAL_RESTORE_INTERRUPTS(oldints); |
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146 CYG_TEST_INFO("Dcache off Icache on"); |
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147 time1(); |
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148 |
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149 HAL_DISABLE_INTERRUPTS(oldints); |
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150 HAL_DCACHE_PURGE_ALL(); |
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151 HAL_ICACHE_INVALIDATE_ALL(); |
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152 HAL_DCACHE_INVALIDATE_ALL(); |
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153 HAL_ICACHE_ENABLE(); |
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154 HAL_DCACHE_ENABLE(); |
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155 HAL_RESTORE_INTERRUPTS(oldints); |
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156 CYG_TEST_INFO("Dcache on Icache on"); |
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157 time1(); |
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158 |
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159 HAL_DISABLE_INTERRUPTS(oldints); |
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160 HAL_DCACHE_PURGE_ALL(); |
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161 HAL_ICACHE_INVALIDATE_ALL(); |
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162 HAL_DCACHE_INVALIDATE_ALL(); |
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163 HAL_ICACHE_DISABLE(); |
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164 HAL_DCACHE_DISABLE(); |
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165 HAL_RESTORE_INTERRUPTS(oldints); |
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166 CYG_TEST_INFO("Dcache off Icache off"); |
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167 time1(); |
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168 |
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169 CYG_TEST_PASS_FINISH("End of test"); |
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170 } |
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171 |
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172 // ------------------------------------------------------------------------- |
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173 |
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174 void cache_main( void ) |
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175 { |
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176 CYG_TEST_INIT(); |
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177 |
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178 entry0(); |
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179 |
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180 } |
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181 |
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182 // ------------------------------------------------------------------------- |
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183 |
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184 externC void |
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185 cyg_start( void ) |
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186 { |
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187 cache_main(); |
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188 } |
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189 |
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190 // ------------------------------------------------------------------------- |
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191 /* EOF cache.c */ |
