--- a/packages/hal/h8300/h8s/current/ChangeLog
+++ b/packages/hal/h8300/h8s/current/ChangeLog
@@ -1,3 +1,19 @@
+2004-03-18  Yoshinori Sato  <ysato@users.sourceforge.jp>
+
+	* include/variant.inc
+	fix exr handling.
+
+2003-12-08  Yoshinori Sato  <ysato@users.sourceforge.jp>
+
+	* src/h8300_h8s.ld
+	fix typo.
+	* src/h8s_stub.c
+	rewrite. use CPU trace support.
+	* include/variant.inc
+	single step exception support.
+	* include/var_arch.h
+	add EXR read/write support.
+
 2003-03-09  Yoshinori Sato  <ysato@users.sourceforge.jp>
 
 	* New package.

--- a/packages/hal/h8300/h8s/current/include/var_arch.h
+++ b/packages/hal/h8300/h8s/current/include/var_arch.h
@@ -83,6 +83,15 @@ typedef struct HAL_SavedRegisters
     CYG_WORD32          pc;
 } HAL_SavedRegisters;
 
+#define HAL_THREAD_INIT_CONTEXT_EXTRA(_regs_, _id_) \
+    {_regs_->exr   = 0;}
+
+#define HAL_GET_GDB_EXTRA_REGISTERS(_regval_,_regs_) \
+    {_regval_[10] = (_regs_)->exr;}
+
+#define HAL_SET_GDB_EXTRA_REGISTERS( _regs_,_regval_) \
+    {(_regs_)->exr = _regval_[10];}
+
 // Internal peripheral registers
 #include <cyg/hal/mod_regs_adc.h>
 #include <cyg/hal/mod_regs_bsc.h>
@@ -95,12 +104,6 @@ typedef struct HAL_SavedRegisters
 #include <cyg/hal/mod_regs_ppg.h>
 #include <cyg/hal/mod_regs_wdt.h>
 
-//--------------------------------------------------------------------------
-
-#ifndef HAL_THREAD_INIT_CONTEXT_EXTRA
-#define HAL_THREAD_INIT_CONTEXT_EXTRA(_regs_, _id_) \
-        (_regs_)->exr = 0;
-#endif
 
 //--------------------------------------------------------------------------
 #endif // CYGONCE_HAL_VAR_ARCH_H

--- a/packages/hal/h8300/h8s/current/include/variant.inc
+++ b/packages/hal/h8300/h8s/current/include/variant.inc
@@ -72,14 +72,14 @@
 # CPU state save and restore macros
 
 	.macro	hal_cpu_save_all
-	subs	#4,sp				; reserve space
-	subs	#2,sp
+	subs	#2,sp				; reserve space
+	subs	#4,sp
 	mov.l	sp,@-sp
 	stm	er0-er3,@-sp
 	stm	er4-er6,@-sp
 	sub.w	e0,e0
 	mov.w	e0,@(4*9:16,sp)			; clear exr high word
-        mov.l	@(4*10:16,sp),r0
+        mov.w	@(4*10:16,sp),r0
 	sub.l	er1,er1
 	mov.b	r0h,r1l
 	mov.l	er1,@(4*8:16,sp)		; copy ccr
@@ -88,18 +88,21 @@
 	.endm
 
 	.macro	hal_cpu_load_all
-	mov.w	@(4*8+2:16,sp),r0
-	mov.w	@(4*10:16,sp),r1
-	mov.b	r0l,r1h
-	mov.w	r1,@(4*10:16,sp)		; set ccr
+	mov.w	@(4*8+2:16,sp),r1		; load ccr
+	mov.w	@(4*10:16,sp),r0		; load pc+ccr high word
+	mov.b	r1l,r0h				; replace ccr byte
+	mov.w	r0,@(4*10:16,sp)		; restore pc+ccr high word
+	mov.w	@(4*9+2:16,sp),r0
+	mov.b	r0l,r0h
+	mov.w	r0,@(4*9+2:16,sp)		; extend exr
 	ldm	@sp+,er4-er6
 	ldm	@sp+,er0-er3
 	add.l	#10,sp
 	.endm
 
         .macro hal_cpu_save_context
-        sub.w   r2,r2
         stc     exr,r2l
+	mov.b	r2l,r2h
         mov.w   r2,@-sp
         hal_cpu_save_all
         .endm
@@ -161,6 +164,12 @@
 	mov.b	r0h,exr
 	.endm
 
+	.macro	h8300_trap_adjust_pc
+	mov.l	@(40:16,sp),er0
+	subs	#2,er0
+	mov.l	er0,@(40:16,sp)
+	.endm
+
 ##-----------------------------------------------------------------------------
 # Default interrupt decoding macros.
 

--- a/packages/hal/h8300/h8s/current/src/h8300_h8s.ld
+++ b/packages/hal/h8300/h8s/current/src/h8300_h8s.ld
@@ -93,7 +93,7 @@ GROUP(libtarget.a libgcc.a)
     { FORCE_OUTPUT; *(.gcc_except_table) } \
     > _region_
 
-#if defined(CYGHWR_HAL_H8300_VECTOR_ADDRESS)
+#if defined(CYGSEM_HAL_H8300_VECTOR_HOOK)
 #define SECTION_int_hook_table(_region_, _vma_, _lma_) \
     .int_hook_table CYGHWR_HAL_H8300_VECTOR_ADDRESS : _lma_ \
     { CYG_LABEL_DEFN(__int_hook_start) = ABSOLUTE (.); \
@@ -130,7 +130,7 @@ GROUP(libtarget.a libgcc.a)
 #define SECTION_bss(_region_, _vma_, _lma_) \
     .bss _vma_ : _lma_ \
     { CYG_LABEL_DEFN(__bss_start) = ABSOLUTE (.); \
-    *(.scommon) *(.dynbss) *(.bss) *(COMMON) \
+    *(.scommon) *(.dynbss) *(.bss.*) *(COMMON) \
     CYG_LABEL_DEFN(__bss_end) = ABSOLUTE (.); } \
     > _region_
 

--- a/packages/hal/h8300/h8s/current/src/h8s_stub.c
+++ b/packages/hal/h8300/h8s/current/src/h8s_stub.c
@@ -65,41 +65,14 @@
 #include <cyg/hal/dbg-threads-api.h>    // dbg_currthread_id
 #endif
 
-/*----------------------------------------------------------------------
- * Asynchronous interrupt support
- */
-
-typedef unsigned short t_inst;
-
-static struct
-{
-  t_inst *targetAddr;
-  t_inst savedInstr;
-} asyncBuffer;
-
-/* Called to asynchronously interrupt a running program.
-   Must be passed address of instruction interrupted.
-   This is typically called in response to a debug port
-   receive interrupt.
-*/
-
-void
-install_async_breakpoint(void *pc)
-{
-  asyncBuffer.targetAddr = pc;
-  asyncBuffer.savedInstr = *(t_inst *)pc;
-  *(t_inst *)pc = (t_inst)HAL_BREAKINST;
-  __instruction_cache(CACHE_FLUSH);
-  __data_cache(CACHE_FLUSH);
-}
-
 /*--------------------------------------------------------------------*/
 /* Given a trap value TRAP, return the corresponding signal. */
 
 int __computeSignal (unsigned int trap_number)
 {
     switch (trap_number) {
-    case 11:
+    case CYGNUM_HAL_VECTOR_TRACE:
+    case CYGNUM_HAL_VECTOR_TRAP3:
         return SIGTRAP;
     default:
         return SIGINT;
@@ -128,126 +101,27 @@ void set_pc (target_register_t pc)
 
 
 /*----------------------------------------------------------------------
- * Single-step support. Lifted from CygMon.
+ * Single-step support. 
  */
 
-#define NUM_SS_BPTS 2
-static target_register_t break_mem [NUM_SS_BPTS] = {0, 0};
-static unsigned short break_mem_data [NUM_SS_BPTS];
-
-/* Set a single-step breakpoint at ADDR.  Up to two such breakpoints
-   can be set; WHICH specifies which one to set (0 or 1).  */
-
-static void
-set_single_bp (int which, unsigned char *addr)
-{
-    if (break_mem[which] == 0) {
-        break_mem[which] = (target_register_t) addr;
-        break_mem_data[which] = *(unsigned short *)addr;
-        *(unsigned short *)addr = HAL_BREAKINST;
-    }
-}
-
 /* Clear any single-step breakpoint(s) that may have been set.  */
 
 void __clear_single_step (void)
 {
-  int x;
-  for (x = 0; x < NUM_SS_BPTS; x++)
-    {
-        unsigned short* addr = (unsigned short *)break_mem[x];
-        if (addr) {
-            *addr = break_mem_data[x];
-            break_mem[x] = 0;
-        }
-    }
+    int exr;
+    exr = get_register(EXR);
+    exr &= 0x7f;  /* clear T flag */
+    put_register(EXR,exr);
 }
 
 /* Set breakpoint(s) to simulate a single step from the current PC.  */
 
-const static unsigned char opcode_length0[]={
-  0x04,0x02,0x04,0x02,0x04,0x02,0x04,0x02,  /* 0x58 */
-  0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,  /* 0x60 */
-  0x02,0x02,0x11,0x11,0x02,0x02,0x04,0x04,  /* 0x68 */
-  0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,  /* 0x70 */
-  0x08,0x04,0x06,0x04,0x04,0x04,0x04,0x04   /* 0x78 */
-};
-
-const static unsigned char opcode_length1[]={
-  0x10,0x00,0x00,0x00,0x11,0x00,0x00,0x00,
-  0x02,0x00,0x00,0x00,0x04,0x04,0x00,0x04
-};
-
-static int insn_length(unsigned char *pc)
-{
-  if (*pc != 0x01 && (*pc < 0x58 || *pc>=0x80)) 
-    return 2;
-  else
-    switch (*pc) {
-      case 0x01:
-	switch (*(pc+1) & 0xf0) {
-	case 0x00:
-	  if (*(pc+2)== 0x78) {
-	    return 10;
-	  } else if (*(pc+2)== 0x6b) {
-	    return (*(pc+3) & 0x20)?8:6;
-	  } else {
-	    return (*(pc+2) & 0x02)?6:4;
-	  }
-	case 0x40:
-	  return (*(pc+2) & 0x02)?8:6;
-	default:
-	  return opcode_length1[*(pc+1)>>4];
-	}
-      case 0x6a:
-      case 0x6b:
-	return (*(pc+1) & 0x20)?6:4;
-      default:
-	return opcode_length0[*pc-0x58];
-    }
-}
-
 void __single_step (void)
 {
-  unsigned int pc = get_register (PC);
-  unsigned int next;
-  unsigned int opcode;
-
-  opcode = *(unsigned short *)pc;
-  next = pc + insn_length((unsigned char *)pc);
-  if (opcode == 0x5470) {
-    /* rts */ 
-    unsigned long *sp;
-    sp = (unsigned long *)get_register(SP);
-    next = *(sp+2) & 0x00ffffff;
-  } else if (((opcode & 0xf000) == 0x4000) || ((opcode & 0xff00) == 0x5500)) { 
-    /* b**:8 */
-    char dsp;
-    dsp = (opcode & 0xff);
-    set_single_bp(1,(unsigned char *)(pc+2+dsp));
-  } else if (((opcode & 0xff00) == 0x5800) || ((opcode & 0xff00) == 0x5c00)) { 
-    /* b**:16 */
-    short dsp;
-    dsp = *(short *)(pc+2);
-    set_single_bp(1,(unsigned char *)(pc+4+dsp));
-  } else if ((opcode & 0xfb00) != 0x5800) {
-    /* jmp / jsr */
-    int regs;
-    const short reg_tbl[]={ER0,ER1,ER2,ER3,ER4,ER5,ER6,SP};
-    switch(opcode & 0xfb00) {
-    case 0x5900:
-      regs = (opcode & 0x0070) >> 8;
-      next = get_register(reg_tbl[regs]);
-      break;
-    case 0x5a00:
-      next = *(unsigned long *)(pc) & 0x00ffffff;
-      break;
-    case 0x5b00:
-      next = *(unsigned long *)(opcode & 0xff);
-      break;
-    }
-  }
-  set_single_bp(0,(unsigned char *)next);
+    int exr;
+    exr = get_register(EXR);
+    exr |= 0x80;  /* set T flag */
+    put_register(EXR,exr);
 }
 
 void __install_breakpoints (void)
@@ -274,13 +148,11 @@ int
 
 
 /* Skip the current instruction. */
+/* only TRAPA instruction */
 
 void __skipinst (void)
 {
-    unsigned long pc = get_register (PC);
-
-    pc+=insn_length((unsigned char *)pc);
-    put_register (PC, (target_register_t) pc);
+    put_register (PC, get_register(PC) + 2);
 }
 
 #endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS

--- a/packages/hal/h8300/h8s/current/src/var_misc.c
+++ b/packages/hal/h8300/h8s/current/src/var_misc.c
@@ -196,13 +196,13 @@ void
 hal_interrupt_mask(int vector)					  
 {
     CYG_BYTE ier;
-    const struct int_regs *regs=&interrupt_registers[vector-12];
+    const struct int_regs *regs=&interrupt_registers[vector-CYGNUM_HAL_INTERRUPT_EXTERNAL_0];
     if (vector == CYGNUM_HAL_INTERRUPT_WDT) {
         HAL_READ_UINT8(CYGARC_TCSR,ier);
 	ier &= ~0x20;
 	HAL_WRITE_UINT16(CYGARC_TCSR,0xa500 | ier);
     } else {
-        if ((vector > 16) && regs->ier) {
+        if ((vector >= CYGNUM_HAL_INTERRUPT_EXTERNAL_0) && regs->ier) {
             HAL_READ_UINT8(regs->ier,ier);
 	    ier &= ~(regs->mask);
             HAL_WRITE_UINT8(regs->ier,ier);
@@ -216,13 +216,13 @@ void
 hal_interrupt_unmask(int vector)					  
 {
     CYG_BYTE ier;
-    const struct int_regs *regs=&interrupt_registers[vector-12];
+    const struct int_regs *regs=&interrupt_registers[vector-CYGNUM_HAL_INTERRUPT_EXTERNAL_0];
     if (vector == CYGNUM_HAL_INTERRUPT_WDT) {
         HAL_READ_UINT8(CYGARC_TCSR,ier);
 	ier |= 0x20;
 	HAL_WRITE_UINT16(CYGARC_TCSR,0xa500 | ier);
     } else {
-        if ((vector > 16) && regs->ier) {
+        if ((vector >= CYGNUM_HAL_INTERRUPT_EXTERNAL_0) && regs->ier) {
             HAL_READ_UINT8(regs->ier,ier);
 	    ier |= regs->mask;
             HAL_WRITE_UINT8(regs->ier,ier);
@@ -236,7 +236,7 @@ void
 hal_interrupt_acknowledge(int vector)					  
 {
     CYG_BYTE isr;
-    const struct int_regs *regs=&interrupt_registers[vector-12];
+    const struct int_regs *regs=&interrupt_registers[vector-CYGNUM_HAL_INTERRUPT_EXTERNAL_0];
     if (vector >= CYGNUM_HAL_INTERRUPT_DEND0A &&
         vector <= CYGNUM_HAL_INTERRUPT_DEND1B)
         return;
@@ -245,7 +245,7 @@ hal_interrupt_acknowledge(int vector)
 	isr &= ~0x80;
 	HAL_WRITE_UINT16(CYGARC_TCSR,0xa500 | isr);
     } else {
-        if ((vector > 16) && regs->isr) {
+        if ((vector >= CYGNUM_HAL_INTERRUPT_EXTERNAL_0) && regs->isr) {
             HAL_READ_UINT8(regs->isr,isr);
 	    isr &= ~(regs->status);
             HAL_WRITE_UINT8(regs->isr,isr);