Mercurial > flash_v2
changeset 1247:20067ba8b7d9
PCI IRQ mapping is platform dependent
| author | gthomas |
|---|---|
| date | Fri, 26 Sep 2003 10:39:39 +0000 |
| parents | 55fbbf4dffb2 |
| children | c6965db486b0 |
| files | packages/hal/powerpc/moab/current/ChangeLog packages/hal/powerpc/moab/current/include/plf_io.h packages/hal/powerpc/ppc40x/current/ChangeLog packages/hal/powerpc/ppc40x/current/src/ppc405_pci.c |
| diffstat | 4 files changed, 54 insertions(+), 42 deletions(-) [+] |
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--- a/packages/hal/powerpc/moab/current/ChangeLog +++ b/packages/hal/powerpc/moab/current/ChangeLog @@ -1,3 +1,7 @@ +2003-09-26 Gary Thomas <gary@mlbassoc.com> + + * include/plf_io.h: PCI IRQ mapping is platform dependent - moved here. + 2003-09-24 Gary Thomas <gary@mlbassoc.com> * src/moab.S: Disable GPIO16 (watchdog timer) as output by default.
--- a/packages/hal/powerpc/moab/current/include/plf_io.h +++ b/packages/hal/powerpc/moab/current/include/plf_io.h @@ -65,6 +65,46 @@ #define CYG_PCI_MAX_BUS 1 // Only one BUS #define CYG_PCI_MIN_DEV 1 // Slots start at 11 #define CYG_PCI_MAX_DEV 21 // ... and end at 31 +#define _IRQ1 CYGNUM_HAL_INTERRUPT_IRQ1 +#define _IRQ2 CYGNUM_HAL_INTERRUPT_IRQ2 +#define _IRQ3 CYGNUM_HAL_INTERRUPT_IRQ3 +#define _IRQ4 CYGNUM_HAL_INTERRUPT_IRQ4 +#define CYG_PCI_IRQ_MAP \ +/* \ + * This mapping comes from this table, based on how the backplane is wired \ + * IRQ assignments (Acrosser): \ + * \ + * CPU Slot1 Slot2 Slot3 Slot4 \ + * IRQ1 PCI INTD INTB INTA INTD na \ + * IRQ2 PCI INTC INTA INTD INTC na \ + * IRQ3 PCI INTB INTD INTC INTB na \ + * IRQ4 PCI INTA INTC INTB INTA na \ + * \ + * PCI IDSEL/INTPIN->INTLINE \ + * A B C D \ + */ \ +{ \ + {_IRQ1, _IRQ4, _IRQ3, _IRQ2}, /* IDSEL 1 - 2nd LAN */ \ + {_IRQ3, _IRQ3, _IRQ3, _IRQ3}, /* IDSEL 2 - USB */ \ + { -1, -1, -1, -1}, /* IDSEL 3 - unavailable */ \ + { -1, -1, -1, -1}, /* IDSEL 4 - unavailable */ \ + { -1, -1, -1, -1}, /* IDSEL 5 - unavailable */ \ + { -1, -1, -1, -1}, /* IDSEL 6 - unavailable */ \ + { -1, -1, -1, -1}, /* IDSEL 7 - unavailable */ \ + { -1, -1, -1, -1}, /* IDSEL 8 - unavailable */ \ + { -1, -1, -1, -1}, /* IDSEL 9 - unavailable */ \ + { -1, -1, -1, -1}, /* IDSEL 10 - unavailable */ \ + { -1, -1, -1, -1}, /* IDSEL 11 - unavailable */ \ + { -1, -1, -1, -1}, /* IDSEL 12 - unavailable */ \ + { -1, -1, -1, -1}, /* IDSEL 13 - unavailable */ \ + { -1, -1, -1, -1}, /* IDSEL 14 - unavailable */ \ + { -1, -1, -1, -1}, /* IDSEL 15 - unavailable */ \ + { -1, -1, -1, -1}, /* IDSEL 16 - unavailable */ \ + {_IRQ1, _IRQ4, _IRQ3, _IRQ2}, /* IDSEL 17 - PCI slot 2 */ \ + {_IRQ4, _IRQ3, _IRQ2, _IRQ1}, /* IDSEL 18 - PCI slot 3 */ \ + {_IRQ1, _IRQ4, _IRQ3, _IRQ2}, /* IDSEL 19 - PCI slot 2 */ \ + {_IRQ2, _IRQ1, _IRQ4, _IRQ3}, /* IDSEL 20 - PCI slot 1 */ \ +} //----------------------------------------------------------------------------- // Resources
--- a/packages/hal/powerpc/ppc40x/current/ChangeLog +++ b/packages/hal/powerpc/ppc40x/current/ChangeLog @@ -1,3 +1,7 @@ +2003-09-26 Gary Thomas <gary@mlbassoc.com> + + * src/ppc405_pci.c: IRQ mapping now defined by platform. + 2003-09-20 Gary Thomas <gary@mlbassoc.com> * src/ppc405_pci.c: Need call to cyg_pci_init() to get proper I/O
--- a/packages/hal/powerpc/ppc40x/current/src/ppc405_pci.c +++ b/packages/hal/powerpc/ppc40x/current/src/ppc405_pci.c @@ -157,48 +157,12 @@ hal_ppc405_pci_translate_interrupt(int b if ((dev >= CYG_PCI_MIN_DEV) && (dev < CYG_PCI_MAX_DEV)) { HAL_PCI_CFG_READ_UINT8(bus, devfn, CYG_PCI_CFG_INT_PIN, req); if (0 != req) { -// -// This mapping comes from this table, based on how the backplane is wired -// IRQ assignments (Acrosser): - -// CPU Slot1 Slot2 Slot3 Slot4 - -// IRQ1 PCI INTD INTB INTA INTD na -// IRQ2 PCI INTC INTA INTD INTC na -// IRQ3 PCI INTB INTD INTC INTB na -// IRQ4 PCI INTA INTC INTB INTA na -#define _IRQ1 CYGNUM_HAL_INTERRUPT_IRQ1 -#define _IRQ2 CYGNUM_HAL_INTERRUPT_IRQ2 -#define _IRQ3 CYGNUM_HAL_INTERRUPT_IRQ3 -#define _IRQ4 CYGNUM_HAL_INTERRUPT_IRQ4 - char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - {_IRQ3, _IRQ3, _IRQ3, _IRQ3}, /* IDSEL 1 - 2nd LAN */ - {_IRQ3, _IRQ3, _IRQ3, _IRQ3}, /* IDSEL 2 - USB */ - { -1, -1, -1, -1}, /* IDSEL 3 - unavailable */ - { -1, -1, -1, -1}, /* IDSEL 4 - unavailable */ - { -1, -1, -1, -1}, /* IDSEL 5 - unavailable */ - { -1, -1, -1, -1}, /* IDSEL 6 - unavailable */ - { -1, -1, -1, -1}, /* IDSEL 7 - unavailable */ - { -1, -1, -1, -1}, /* IDSEL 8 - unavailable */ - { -1, -1, -1, -1}, /* IDSEL 9 - unavailable */ - { -1, -1, -1, -1}, /* IDSEL 10 - unavailable */ - { -1, -1, -1, -1}, /* IDSEL 11 - unavailable */ - { -1, -1, -1, -1}, /* IDSEL 12 - unavailable */ - { -1, -1, -1, -1}, /* IDSEL 13 - unavailable */ - { -1, -1, -1, -1}, /* IDSEL 14 - unavailable */ - { -1, -1, -1, -1}, /* IDSEL 15 - unavailable */ - { -1, -1, -1, -1}, /* IDSEL 16 - unavailable */ - {_IRQ1, _IRQ4, _IRQ3, _IRQ2}, /* IDSEL 17 - PCI slot 2 */ - {_IRQ4, _IRQ3, _IRQ2, _IRQ1}, /* IDSEL 18 - PCI slot 3 */ - {_IRQ1, _IRQ4, _IRQ3, _IRQ2}, /* IDSEL 19 - PCI slot 2 */ - {_IRQ2, _IRQ1, _IRQ4, _IRQ3}, /* IDSEL 20 - PCI slot 1 */ - }; - *vec = pci_irq_table[dev-1][req-1]; +#ifdef CYG_PCI_IRQ_MAP + char pci_irq_table[][4] = CYG_PCI_IRQ_MAP; +#else +#error "Need platform defined IRQ map" +#endif + *vec = pci_irq_table[dev-CYG_PCI_MIN_DEV][req-1]; *valid = (*vec != -1); } else { /* Device will not generate interrupt requests. */