Mercurial > flash_v2
changeset 56:755351606154 ecos-sw-1999-12-01
Merge from eCos master repository on 1999-12-01-18:03:05-GMT
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--- a/packages/hal/arm/aeb/current/ChangeLog +++ b/packages/hal/arm/aeb/current/ChangeLog @@ -1,3 +1,19 @@ +1999-11-25 Jonathan Larmour <jlarmour@cygnus.co.uk> + + * src/hal_diag.c: Conditionalize def of diag_buffer for only when it's + explicitly wanted and someone hacks the code + (hal_diag_write_char): Likewise + +1999-11-25 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/mlt_arm_aeb_stubs.h: + * include/pkgconf/mlt_arm_aebC_stubs.h: New file. + + * include/pkgconf/mlt_arm_aeb_rom.h: + * include/pkgconf/mlt_arm_aeb_ram.h: + * include/pkgconf/mlt_arm_aebC_rom.h: + * include/pkgconf/mlt_arm_aebC_ram.h: Update "do not edit" string. + 1999-11-09 Gary Thomas <gthomas@cygnus.co.uk> * include/pkgconf/mlt_arm_aebC_ram.h:
--- a/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aebC_ram.h +++ b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aebC_ram.h @@ -1,6 +1,6 @@ // eCos memory layout - Tue Nov 09 07:03:07 1999 -// This is a generated file - do not edit +// This is a generated file - changes will be lost if ConfigTool(MLT) is run #include <cyg/infra/cyg_type.h> #include <stddef.h>
--- a/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aebC_rom.h +++ b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aebC_rom.h @@ -1,6 +1,6 @@ // eCos memory layout - Mon Nov 08 10:19:24 1999 -// This is a generated file - do not edit +// This is a generated file - changes will be lost if ConfigTool(MLT) is run #include <cyg/infra/cyg_type.h> #include <stddef.h>
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aebC_stubs.h @@ -0,0 +1,13 @@ +// eCos memory layout - Wed Nov 24 10:41:40 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0x8000) +#define CYGMEM_REGION_ram_SIZE (0x4000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0x4018000) +#define CYGMEM_REGION_rom_SIZE (0x8000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
--- a/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_ram.h +++ b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_ram.h @@ -1,6 +1,6 @@ // eCos memory layout - Mon Nov 08 07:44:09 1999 -// This is a generated file - do not edit +// This is a generated file - changes will be lost if ConfigTool(MLT) is run #include <cyg/infra/cyg_type.h> #include <stddef.h>
--- a/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_rom.h +++ b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_rom.h @@ -1,6 +1,6 @@ // eCos memory layout - Mon Nov 08 07:49:32 1999 -// This is a generated file - do not edit +// This is a generated file - changes will be lost if ConfigTool(MLT) is run #include <cyg/infra/cyg_type.h> #include <stddef.h>
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/aeb/current/include/pkgconf/mlt_arm_aeb_stubs.h @@ -0,0 +1,13 @@ +// eCos memory layout - Wed Nov 24 10:40:47 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0x8000) +#define CYGMEM_REGION_ram_SIZE (0x4000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0x4018000) +#define CYGMEM_REGION_rom_SIZE (0x8000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
--- a/packages/hal/arm/aeb/current/src/hal_diag.c +++ b/packages/hal/arm/aeb/current/src/hal_diag.c @@ -168,6 +168,7 @@ void hal_diag_init(void) while (*msg) hal_diag_write_char(*msg++); } +#ifdef DEBUG_DIAG #if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) #define DIAG_BUFSIZE 32 #else @@ -175,6 +176,7 @@ void hal_diag_init(void) #endif static char diag_buffer[DIAG_BUFSIZE]; static int diag_bp = 0; +#endif void hal_diag_write_char(char c) { @@ -187,8 +189,10 @@ void hal_diag_write_char(char c) HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_THR, c); HAL_IO_BARRIER (); +#ifdef DEBUG_DIAG diag_buffer[diag_bp++] = c; if (diag_bp == DIAG_BUFSIZE) diag_bp = 0; +#endif } void hal_diag_read_char(char *c)
--- a/packages/hal/arm/arch/current/ChangeLog +++ b/packages/hal/arm/arch/current/ChangeLog @@ -1,3 +1,18 @@ +1999-11-22 Gary Thomas <gthomas@cygnus.co.uk> + + * src/arm.ld: Add section for definining static MMU tables. + + * src/vectors.S: Introduce PLATFORM_EXTRAS, which if defined provides + a hook to include platform code in the "vectors.S" file. In particular, + some platforms will define this to be <cyg/hal/hal_platform_extras.h> + and define static MMU tables there. + +1999-11-19 Jonathan Larmour <jlarmour@cygnus.co.uk> + + * include/basetype.h (CYG_BYTEORDER): If the toolchain tells us to be + big-endian, be big-endian + Reported by Grant Edwards + 1999-11-12 Gary Thomas <gthomas@cygnus.co.uk> * src/vectors.S (reset_platform): New function used to reset board
--- a/packages/hal/arm/arch/current/include/basetype.h +++ b/packages/hal/arm/arch/current/include/basetype.h @@ -45,7 +45,11 @@ //----------------------------------------------------------------------------- // Characterize the architecture -#define CYG_BYTEORDER CYG_LSBFIRST // Little endian +#ifdef __ARMEB__ +# define CYG_BYTEORDER CYG_MSBFIRST // Big endian +#else +# define CYG_BYTEORDER CYG_LSBFIRST // Little endian +#endif #define CYG_DOUBLE_BYTEORDER CYG_MSBFIRST // Big? endian //-----------------------------------------------------------------------------
--- a/packages/hal/arm/arch/current/src/arm.ld +++ b/packages/hal/arm/arch/current/src/arm.ld @@ -114,6 +114,11 @@ OUTPUT_FORMAT(elf32-bigarm) { FORCE_OUTPUT; *(.gcc_except_table) } \ > _region_ +#define SECTION_mmu_tables(_region_, _vma_, _lma_) \ + .mmu_tables _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.mmu_tables) } \ + > _region_ + #define SECTION_data(_region_, _vma_, _lma_) \ .data _vma_ : _lma_ \ { __ram_data_start = ABSOLUTE (.); *(.data*) *(.data1) MERGE_IN_RODATA \
--- a/packages/hal/arm/arch/current/src/vectors.S +++ b/packages/hal/arm/arch/current/src/vectors.S @@ -878,5 +878,9 @@ irq_level: .balign 16 __startup_stack: +#ifdef PLATFORM_EXTRAS +#include PLATFORM_EXTRAS +#endif + // -------------------------------------------------------------------------- // end of vectors.S
--- a/packages/hal/arm/cma230/current/ChangeLog +++ b/packages/hal/arm/cma230/current/ChangeLog @@ -1,12 +1,20 @@ +1999-11-25 Jonathan Larmour <jlarmour@cygnus.co.uk> + + * src/hal_diag.c: Conditionalize def of diag_buffer for only when it's + explicitly wanted and someone hacks the code + (hal_diag_write_char): Likewise + +1999-11-25 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/mlt_arm_cma230_stubs.h: New file. + * include/pkgconf/mlt_arm_cma230_rom.h: + * include/pkgconf/mlt_arm_cma230_ram.h: Update "do not edit" strings. + 1999-11-09 Gary Thomas <gthomas@cygnus.co.uk> - * include/pkgconf/mlt_arm_cma230T_ram.h: - * include/pkgconf/mlt_arm_cma230T_rom.h: * include/pkgconf/mlt_arm_cma230_ram.h: * include/pkgconf/mlt_arm_cma230_rom.h: New files. - * include/pkgconf/mlt_arm_cma230T_ram.ldi: - * include/pkgconf/mlt_arm_cma230T_ram.ldi: * include/pkgconf/mlt_arm_cma230_rom.ldi: * include/pkgconf/mlt_arm_cma230_rom.mlt: Update with correct memory layout.
--- a/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma230_ram.h +++ b/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma230_ram.h @@ -1,6 +1,6 @@ // eCos memory layout - Tue Nov 09 08:15:25 1999 -// This is a generated file - do not edit +// This is a generated file - changes will be lost if ConfigTool(MLT) is run #include <cyg/infra/cyg_type.h> #include <stddef.h>
--- a/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma230_rom.h +++ b/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma230_rom.h @@ -1,6 +1,6 @@ // eCos memory layout - Tue Nov 09 08:31:08 1999 -// This is a generated file - do not edit +// This is a generated file - changes will be lost if ConfigTool(MLT) is run #include <cyg/infra/cyg_type.h> #include <stddef.h>
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/cma230/current/include/pkgconf/mlt_arm_cma230_stubs.h @@ -0,0 +1,13 @@ +// eCos memory layout - Wed Nov 24 10:44:28 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0x1000) +#define CYGMEM_REGION_ram_SIZE (0x7000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0xe000000) +#define CYGMEM_REGION_rom_SIZE (0x40000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
--- a/packages/hal/arm/cma230/current/src/hal_diag.c +++ b/packages/hal/arm/cma230/current/src/hal_diag.c @@ -188,6 +188,7 @@ void hal_diag_init(void) while (*msg) hal_diag_write_char(*msg++); } +#ifdef DEBUG_DIAG #if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) #define DIAG_BUFSIZE 32 #else @@ -195,6 +196,7 @@ void hal_diag_init(void) #endif static char diag_buffer[DIAG_BUFSIZE]; static int diag_bp = 0; +#endif void hal_diag_write_char(char c) { @@ -206,11 +208,13 @@ void hal_diag_write_char(char c) } while ((lsr & SIO_LSR_THRE) == 0); HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_THR, c); +#ifdef DEBUG_DIAG diag_buffer[diag_bp++] = c; if (diag_bp == DIAG_BUFSIZE) { while (1) ; diag_bp = 0; } +#endif } void hal_diag_read_char(char *c)
--- a/packages/hal/arm/edb7xxx/current/ChangeLog +++ b/packages/hal/arm/edb7xxx/current/ChangeLog @@ -1,3 +1,58 @@ +1999-11-29 Jonathan Larmour <jlarmour@cygnus.co.uk> + + * src/hal_diag.c: Fix typoe: CYGDGB_HAL_DIAG_DISABLE_GDB_PROTOCOL + -> CYGDBG_HAL_DIAG_DISABLE_GDB_PROTOCOL + +1999-11-27 Jonathan Larmour <jlarmour@cygnus.co.uk> + + * include/pkgconf/hal_arm_edb7xxx.h (HAL_PLATFORM_BOARD): Add missing endif + +1999-11-26 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/hal_arm_edb7xxx.h: Add platform info defines. + +1999-11-26 Jonathan Larmour <jlarmour@cygnus.co.uk> + + * include/hal_platform_setup.h (PLATFORM_SETUP1): Backslash wrapped + line properly + +1999-11-25 Jonathan Larmour <jlarmour@cygnus.co.uk> + + * include/hal_platform_setup.h (PLATFORM_SETUP1): Fix typo + Init_MEMORY_CONFIG -> INIT_MEMORY_CONFIG + + * src/hal_diag.c: Conditionalize def of diag_buffer for only when it's + explicitly wanted and someone hacks the code + (hal_diag_write_char): Likewise + +1999-11-25 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/mlt_arm_edb7211_stubs.h: + * include/pkgconf/mlt_arm_cl7111_stubs.h: New file. + + * include/pkgconf/mlt_arm_edb7211_ram.h: + * include/pkgconf/mlt_arm_edb7211_rom.h: + * include/pkgconf/mlt_arm_cl7111_rom.h: + * include/pkgconf/mlt_arm_cl7111_ram.h: Update 'do not edit' strings. + +1999-11-23 Gary Thomas <gthomas@cygnus.co.uk> + + * src/edb7xxx_misc.c (hal_clock_reset): Fix DRAM "idle" time > 200us. + +1999-11-22 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/mlt_arm_edb7211_stubs.h: New file. + + * include/pkgconf/mlt_arm_edb7211_stubs.mlt: + * include/pkgconf/mlt_arm_edb7211_stubs.ldi: Add MMU tables section. + + * misc/STUBS_config: Add patch to set up for static MMU tables. + + * include/hal_platform_setup.h: Some rearranging to allow for + static MMU tables. + + * include/hal_platform_extras.h: New file. + 1999-11-19 Gary Thomas <gthomas@cygnus.co.uk> * include/pkgconf/hal_arm_edb7xxx.h: Fix bogus comment.
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/include/hal_platform_extras.h @@ -0,0 +1,153 @@ +#ifndef CYGONCE_HAL_PLATFORM_EXTRAS_H +#define CYGONCE_HAL_PLATFORM_EXTRAS_H + +/*============================================================================= +// +// hal_platform_extras.h +// +// Platform specific support for HAL (assembly code) +// +//============================================================================= +//####COPYRIGHTBEGIN#### +// +// ------------------------------------------- +// The contents of this file are subject to the Cygnus eCos Public License +// Version 1.0 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://sourceware.cygnus.com/ecos +// +// Software distributed under the License is distributed on an "AS IS" +// basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the +// License for the specific language governing rights and limitations under +// the License. +// +// The Original Code is eCos - Embedded Cygnus Operating System, released +// September 30, 1998. +// +// The Initial Developer of the Original Code is Cygnus. Portions created +// by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. +// ------------------------------------------- +// +//####COPYRIGHTEND#### +//============================================================================= +//#####DESCRIPTIONBEGIN#### +// +// Author(s): gthomas +// Contributors: gthomas +// Date: 1999-11-23 +// Purpose: Cirrus EDB7XXX platform extras, in particular MMU tables +// Description: +// Usage: #include <cyg/hal/hal_platform_extras.h> +// +//####DESCRIPTIONEND#### +// +//===========================================================================*/ + + .section ".mmu_tables","aw" + +#define NEXT_PAGE \ + .long PTE ; \ + .set PTE,PTE+MMU_PAGE_SIZE +_PT_0x0: +#if (CYGHWR_HAL_ARM_EDB7XXX_DRAM_SIZE == 2) +#err Static MMU tables not yet available for 2M boards. +#elif (CYGHWR_HAL_ARM_EDB7XXX_DRAM_SIZE == 16) + .set PTE,(DRAM_PA_START+LCD_BUFFER_SIZE)|MMU_L2_TYPE_Small\ + |MMU_AP_Any|MMU_Bufferable|MMU_Cacheable + .rept (0x800000-LCD_BUFFER_SIZE)/0x1000 + NEXT_PAGE + .endr + .set PTE,(DRAM_PA_START+0x01000000)|MMU_L2_TYPE_Small\ + |MMU_AP_Any|MMU_Bufferable|MMU_Cacheable + .rept 0x800000/0x1000 + NEXT_PAGE + .endr +#endif + .balign 0x0400 + +// Too bad these macros don't work ['as' bug?] :-( + +#define NEXT_SECTION \ + .long PTE+OFF ;\ + .set OFF,OFF+(MMU_SECTION_SIZE/MMU_PAGE_SIZE)*4 + +#define FILL_SEGMENT_(base) \ + .set PTE,base \ + .set OFF,0x00000000 \ + .rept 0x10000000/MMU_SECTION_SIZE \ + NEXT_SECTION \ + .endr + +#define OFF ((MMU_SECTION_SIZE/MMU_PAGE_SIZE)*4) + +#define FILL_16M_SEGMENT(base,seg) \ + .long base+(OFF*(seg+0x00)); \ + .long base+(OFF*(seg+0x01)); \ + .long base+(OFF*(seg+0x02)); \ + .long base+(OFF*(seg+0x03)); \ + .long base+(OFF*(seg+0x04)); \ + .long base+(OFF*(seg+0x05)); \ + .long base+(OFF*(seg+0x06)); \ + .long base+(OFF*(seg+0x07)); \ + .long base+(OFF*(seg+0x08)); \ + .long base+(OFF*(seg+0x09)); \ + .long base+(OFF*(seg+0x0A)); \ + .long base+(OFF*(seg+0x0B)); \ + .long base+(OFF*(seg+0x0C)); \ + .long base+(OFF*(seg+0x0D)); \ + .long base+(OFF*(seg+0x0E)); \ + .long base+(OFF*(seg+0x0F)); + +#define FILL_256M_SEGMENT(base) \ + FILL_16M_SEGMENT(base,0x00); \ + FILL_16M_SEGMENT(base,0x10); \ + FILL_16M_SEGMENT(base,0x20); \ + FILL_16M_SEGMENT(base,0x30); \ + FILL_16M_SEGMENT(base,0x40); \ + FILL_16M_SEGMENT(base,0x50); \ + FILL_16M_SEGMENT(base,0x60); \ + FILL_16M_SEGMENT(base,0x70); \ + FILL_16M_SEGMENT(base,0x80); \ + FILL_16M_SEGMENT(base,0x90); \ + FILL_16M_SEGMENT(base,0xA0); \ + FILL_16M_SEGMENT(base,0xB0); \ + FILL_16M_SEGMENT(base,0xC0); \ + FILL_16M_SEGMENT(base,0xD0); \ + FILL_16M_SEGMENT(base,0xE0); \ + FILL_16M_SEGMENT(base,0xF0); + + .balign 0x4000 +_MMU_table: + FILL_16M_SEGMENT(_PT_0x0-0xE0000000+MMU_L1_TYPE_Page,0x00) + FILL_16M_SEGMENT(MMU_L1_TYPE_Fault,0x00) + FILL_16M_SEGMENT(MMU_L1_TYPE_Fault,0x00) + FILL_16M_SEGMENT(MMU_L1_TYPE_Fault,0x00) + FILL_16M_SEGMENT(MMU_L1_TYPE_Fault,0x00) + FILL_16M_SEGMENT(MMU_L1_TYPE_Fault,0x00) + FILL_16M_SEGMENT(MMU_L1_TYPE_Fault,0x00) + FILL_16M_SEGMENT(MMU_L1_TYPE_Fault,0x00) + FILL_16M_SEGMENT(MMU_L1_TYPE_Fault,0x00) + FILL_16M_SEGMENT(MMU_L1_TYPE_Fault,0x00) + FILL_16M_SEGMENT(MMU_L1_TYPE_Fault,0x00) + FILL_16M_SEGMENT(MMU_L1_TYPE_Fault,0x00) + FILL_16M_SEGMENT(MMU_L1_TYPE_Fault,0x00) + FILL_16M_SEGMENT(MMU_L1_TYPE_Fault,0x00) + FILL_16M_SEGMENT(MMU_L1_TYPE_Fault,0x00) + FILL_16M_SEGMENT(MMU_L1_TYPE_Fault,0x00) + FILL_256M_SEGMENT(MMU_L1_TYPE_Fault) + FILL_256M_SEGMENT(MMU_L1_TYPE_Fault) + FILL_256M_SEGMENT(MMU_L1_TYPE_Fault) + FILL_256M_SEGMENT(MMU_L1_TYPE_Fault) + FILL_256M_SEGMENT(MMU_L1_TYPE_Fault) + FILL_256M_SEGMENT(SRAM_PA|MMU_L1_TYPE_Section|MMU_AP_Any) + FILL_256M_SEGMENT(MMU_L1_TYPE_Fault) + FILL_256M_SEGMENT(IO_PA|MMU_L1_TYPE_Section|MMU_AP_Any) + FILL_256M_SEGMENT(MMU_L1_TYPE_Fault) + FILL_256M_SEGMENT(MMU_L1_TYPE_Fault) + FILL_256M_SEGMENT(MMU_L1_TYPE_Fault) + FILL_256M_SEGMENT(DRAM_PA|MMU_L1_TYPE_Section|MMU_AP_Any) + FILL_256M_SEGMENT(MMU_L1_TYPE_Fault) + FILL_256M_SEGMENT(ROM0_PA|MMU_L1_TYPE_Section|MMU_AP_Any) + FILL_256M_SEGMENT(ROM1_PA|MMU_L1_TYPE_Section|MMU_AP_Any) + +#endif // CYGONCE_HAL_PLATFORM_EXTRAS_H
--- a/packages/hal/arm/edb7xxx/current/include/hal_platform_setup.h +++ b/packages/hal/arm/edb7xxx/current/include/hal_platform_setup.h @@ -44,8 +44,9 @@ //===========================================================================*/ #include <pkgconf/system.h> // System-wide configuration info +#include <pkgconf/hal.h> // Architecture independent configuration #include CYGBLD_HAL_PLATFORM_H // Platform specific configuration -#include <cyg/hal/hal_edb7xxx.h> // Platform specific hardware definitions +#include <cyg/hal/hal_edb7xxx.h> // Platform specific hardware definitions #include <cyg/hal/hal_mmu.h> // MMU definitions #define CYGHWR_HAL_ARM_HAS_MMU // This processor has an MMU @@ -73,7 +74,7 @@ #endif #define DRAM_PA_START 0xC0000000 #define MMU_BASE DRAM_PA_START+LCD_BUFFER_SIZE -#define PTE_BASE DRAM_PA_START+0x4000+LCD_BUFFER_SIZE +#define PTE_BASE MMU_BASE+0x4000 #if (CYGHWR_HAL_ARM_EDB7XXX_DRAM_SIZE == 2) #define MMU_TABLES_SIZE (0x4000+0x1000+0x1000) // RAM used for PTE entries #define DRAM_LA_END (0x00200000-MMU_TABLES_SIZE-LCD_BUFFER_SIZE) @@ -108,7 +109,84 @@ #define IO_PA 0x80000000 // Define startup code [macros] -#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_STUBS) +#if defined(CYGSEM_HAL_INSTALL_MMU_TABLES) && !defined(CYG_HAL_STARTUP_RAM) + +#ifdef CYG_HAL_ARM_CL7111 // CL7111, 710 processor +#define MMU_INITIALIZE \ + ldr r2,=MMU_Control_Init ;\ + mcr MMU_CP,0,r2,MMU_Control,c0 /* MMU off */ ;\ + mcr MMU_CP,0,r1,MMU_Base,c0 ;\ + mcr MMU_CP,0,r1,MMU_FlushTLB,c0,0 /* Invalidate TLB */ ;\ + mcr MMU_CP,0,r1,MMU_FlushIDC,c0,0 /* Invalidate Caches */ ;\ + ldr r1,=0xFFFFFFFF ;\ + mcr MMU_CP,0,r1,MMU_DomainAccess,c0 ;\ + ldr r2,=10f ;\ + ldr r1,=MMU_Control_Init|MMU_Control_M ;\ + mcr MMU_CP,0,r1,MMU_Control,c0 ;\ + mov pc,r2 /* Change address spaces */ ;\ + nop ;\ + nop ;\ + nop ;\ +10: +#else // EP7211, 720T processor +#define MMU_INITIALIZE \ + ldr r2,=MMU_Control_Init ;\ + mcr MMU_CP,0,r2,MMU_Control,c0 /* MMU off */ ;\ + mcr MMU_CP,0,r1,MMU_Base,c0 ;\ + mcr MMU_CP,0,r1,MMU_TLB,c7,0 /* Invalidate TLB */ ;\ + mcr MMU_CP,0,r1,MMU_FlushIDC,c0,0 /* Invalidate Caches */ ;\ + ldr r1,=0xFFFFFFFF ;\ + mcr MMU_CP,0,r1,MMU_DomainAccess,c0 ;\ + ldr r2,=10f ;\ + ldr r3,=__exception_handlers ;\ + sub r2,r2,r3 ;\ + ldr r3,=ROM0_LA_START ;\ + add r2,r2,r3 ;\ + ldr r1,=MMU_Control_Init|MMU_Control_M ;\ + mcr MMU_CP,0,r1,MMU_Control,c0 ;\ + mov pc,r2 /* Change address spaces */ ;\ + nop ;\ + nop ;\ + nop ;\ +10: +#endif + +#define RELOCATE_TEXT_SEGMENT \ + ldr r2,=__exception_handlers ;\ + ldr r3,=ROM0_LA_START ;\ + cmp r2,r3 ;\ + beq 20f ;\ + ldr r4,=__rom_data_end ;\ +15: ;\ + ldr r0,[r3],#4 ;\ + str r0,[r2],#4 ;\ + cmp r2,r4 ;\ + bne 15b ;\ +20: + +#define INIT_MEMORY_CONFIG \ +/* Initialize memory configuration */ ;\ + ldr r1,=MEMCFG1 ;\ + ldr r2,=0x8200A080 ;\ + str r2,[r1] ;\ + ldr r1,=MEMCFG2 ;\ + ldr r2,=0xFEFC0000 ;\ + str r2,[r1] ;\ + ldr r1,=DRFPR ;\ + ldr r2,=0x81 /* DRAM refresh = 64KHz */ ;\ + strb r2,[r1] + +#if defined(CYGSEM_HAL_STATIC_MMU_TABLES) +#define PLATFORM_SETUP1 \ + INIT_MEMORY_CONFIG ;\ + ldr r1,=_MMU_table-0xE0000000 ;\ + MMU_INITIALIZE ;\ + RELOCATE_TEXT_SEGMENT + +#define PLATFORM_EXTRAS <cyg/hal/hal_platform_extras.h> + +#else +// MMU tables placed in DRAM #if (CYGHWR_HAL_ARM_EDB7XXX_DRAM_SIZE == 2) // Note: The DRAM on this board is very irregular in that every @@ -124,299 +202,241 @@ // etc. // The MMU mapping code takes this into consideration and creates // a continuous logical map for the DRAM. -#define MAP_DRAM \ -/* Map DRAM */ ;\ - ldr r3,=DRAM_LA_START ;\ - ldr r4,=DRAM_LA_END ;\ - ldr r5,=DRAM_PA ;\ -/* 0x00000000..0x000FFFFF */ ;\ - mov r6,r2 /* Set up page table descriptor */ ;\ - ldr r7,=MMU_L1_TYPE_Page ;\ - orr r6,r6,r7 ;\ - str r6,[r1],#4 /* Store PTE, update pointer */ ;\ -10: mov r6,r5 /* Build page table entry */ ;\ - ldr r7,=MMU_L2_TYPE_Small|MMU_AP_Any|MMU_Bufferable|MMU_Cacheable ;\ - orr r6,r6,r7 ;\ - ldr r7,=MMU_PAGE_SIZE ;\ - str r6,[r2],#4 /* Next page */ ;\ - add r3,r3,r7 ;\ - add r5,r5,r7 ;\ - ldr r8,=DRAM_LA_START+MMU_SECTION_SIZE ;\ - cmp r3,r8 /* Done with first 1M? */ ;\ - beq 20f ;\ - ldr r7,=0x40000 /* Special check for 256K boundary */ ;\ - and r7,r7,r5 ;\ - cmp r7,#0 ;\ - beq 10b ;\ - add r5,r5,r7 /* Skip 256K hole */ ;\ - ldr r7,=0x100000 ;\ - and r7,r5,r7 ;\ - beq 10b ;\ - add r5,r5,r7 /* Nothing at 0xC0100000 */ ;\ - ldr r7,=0x400000 /* Also nothing at 0xC0400000 */ ;\ - and r7,r5,r7 ;\ - beq 10b ;\ - add r5,r5,r7 ;\ - b 10b ;\ -20: ;\ -/* 0x00100000..0x001FFFFF */ ;\ - mov r6,r2 /* Set up page table descriptor */ ;\ - ldr r7,=MMU_L1_TYPE_Page ;\ - orr r6,r6,r7 ;\ - str r6,[r1],#4 /* Store PTE, update pointer */ ;\ -10: mov r6,r5 /* Build page table entry */ ;\ - ldr r7,=MMU_L2_TYPE_Small|MMU_AP_Any|MMU_Bufferable|MMU_Cacheable ;\ - orr r6,r6,r7 ;\ - ldr r7,=MMU_PAGE_SIZE ;\ - str r6,[r2],#4 /* Next page */ ;\ - add r3,r3,r7 ;\ - cmp r3,r4 /* Done with first DRAM? */ ;\ - beq 20f ;\ - add r5,r5,r7 ;\ - ldr r7,=0x40000 /* Special check for 256K boundary */ ;\ - and r7,r7,r5 ;\ - cmp r7,#0 ;\ - beq 10b ;\ - add r5,r5,r7 /* Skip 256K hole */ ;\ - ldr r7,=0x100000 ;\ - and r7,r5,r7 ;\ - beq 10b ;\ - add r5,r5,r7 /* Nothing at 0xC0300000 */ ;\ - ldr r7,=0x400000 /* Also nothing at 0xC0400000 */ ;\ - and r7,r5,r7 ;\ - beq 10b ;\ - add r5,r5,r7 ;\ - b 10b ;\ -20: ; +#define MAP_DRAM \ +/* Map DRAM */ ;\ + ldr r3,=DRAM_LA_START ;\ + ldr r4,=DRAM_LA_END ;\ + ldr r5,=DRAM_PA ;\ +/* 0x00000000..0x000FFFFF */ ;\ + mov r6,r2 /* Set up page table descriptor */ ;\ + ldr r7,=MMU_L1_TYPE_Page ;\ + orr r6,r6,r7 ;\ + str r6,[r1],#4 /* Store PTE, update pointer */ ;\ +10: mov r6,r5 /* Build page table entry */ ;\ + ldr r7,=MMU_L2_TYPE_Small|MMU_AP_Any|MMU_Bufferable|MMU_Cacheable;\ + orr r6,r6,r7 ;\ + ldr r7,=MMU_PAGE_SIZE ;\ + str r6,[r2],#4 /* Next page */ ;\ + add r3,r3,r7 ;\ + add r5,r5,r7 ;\ + ldr r8,=DRAM_LA_START+MMU_SECTION_SIZE ;\ + cmp r3,r8 /* Done with first 1M? */ ;\ + beq 20f ;\ + ldr r7,=0x40000 /* Special check for 256K boundary */ ;\ + and r7,r7,r5 ;\ + cmp r7,#0 ;\ + beq 10b ;\ + add r5,r5,r7 /* Skip 256K hole */ ;\ + ldr r7,=0x100000 ;\ + and r7,r5,r7 ;\ + beq 10b ;\ + add r5,r5,r7 /* Nothing at 0xC0100000 */ ;\ + ldr r7,=0x400000 /* Also nothing at 0xC0400000 */ ;\ + and r7,r5,r7 ;\ + beq 10b ;\ + add r5,r5,r7 ;\ + b 10b ;\ +20: ;\ +/* 0x00100000..0x001FFFFF */ ;\ + mov r6,r2 /* Set up page table descriptor */ ;\ + ldr r7,=MMU_L1_TYPE_Page ;\ + orr r6,r6,r7 ;\ + str r6,[r1],#4 /* Store PTE, update pointer */ ;\ +10: mov r6,r5 /* Build page table entry */ ;\ + ldr r7,=MMU_L2_TYPE_Small|MMU_AP_Any|MMU_Bufferable|MMU_Cacheable;\ + orr r6,r6,r7 ;\ + ldr r7,=MMU_PAGE_SIZE ;\ + str r6,[r2],#4 /* Next page */ ;\ + add r3,r3,r7 ;\ + cmp r3,r4 /* Done with first DRAM? */ ;\ + beq 20f ;\ + add r5,r5,r7 ;\ + ldr r7,=0x40000 /* Special check for 256K boundary */ ;\ + and r7,r7,r5 ;\ + cmp r7,#0 ;\ + beq 10b ;\ + add r5,r5,r7 /* Skip 256K hole */ ;\ + ldr r7,=0x100000 ;\ + and r7,r5,r7 ;\ + beq 10b ;\ + add r5,r5,r7 /* Nothing at 0xC0300000 */ ;\ + ldr r7,=0x400000 /* Also nothing at 0xC0400000 */ ;\ + and r7,r5,r7 ;\ + beq 10b ;\ + add r5,r5,r7 ;\ + b 10b ;\ +20: + #elif (CYGHWR_HAL_ARM_EDB7XXX_DRAM_SIZE == 16) // The 16M board is arranged as: // 0xC0000000..0xC07FFFFF // 0xC1000000..0xC17FFFFF -#define MAP_DRAM \ -/* Map DRAM */ ;\ - ldr r3,=DRAM_LA_START ;\ - ldr r4,=DRAM_LA_END ;\ - ldr r5,=DRAM_PA ;\ -/* 0xXXX00000..0xXXXFFFFF */ ;\ -10: mov r6,r2 /* Set up page table descriptor */ ;\ - ldr r7,=MMU_L1_TYPE_Page ;\ - orr r6,r6,r7 ;\ - str r6,[r1],#4 /* Store PTE, update pointer */ ;\ - ldr r8,=MMU_SECTION_SIZE/MMU_PAGE_SIZE ;\ - ldr r9,=DRAM_PA_START+0x00800000 /* Need to skip at 8M boundary */ ;\ -12: cmp r5,r9 ;\ - bne 15f ;\ - ldr r5,=DRAM_PA_START+0x01000000 /* Next chunk of DRAM */ ;\ -15: mov r6,r5 /* Build page table entry */ ;\ - ldr r7,=MMU_L2_TYPE_Small|MMU_AP_Any|MMU_Bufferable|MMU_Cacheable ;\ - orr r6,r6,r7 ;\ - ldr r7,=MMU_PAGE_SIZE ;\ - str r6,[r2],#4 /* Next page */ ;\ - add r3,r3,r7 ;\ - add r5,r5,r7 ;\ - cmp r3,r4 /* End of DRAM? */ ;\ - beq 20f ;\ - sub r8,r8,#1 /* End of 1M section? */ ;\ - cmp r8,#0 ;\ - bne 12b /* Next page */ ;\ - b 10b /* Next section */ ;\ -20: +#define MAP_DRAM \ +/* Map DRAM */ ;\ + ldr r3,=DRAM_LA_START ;\ + ldr r4,=DRAM_LA_END ;\ + ldr r5,=DRAM_PA ;\ +/* 0xXXX00000..0xXXXFFFFF */ ;\ +10: mov r6,r2 /* Set up page table descriptor */ ;\ + ldr r7,=MMU_L1_TYPE_Page ;\ + orr r6,r6,r7 ;\ + str r6,[r1],#4 /* Store PTE, update pointer */ ;\ + ldr r8,=MMU_SECTION_SIZE/MMU_PAGE_SIZE ;\ + ldr r9,=DRAM_PA_START+0x00800000 /* Skip at 8M boundary */ ;\ +12: cmp r5,r9 ;\ + bne 15f ;\ + ldr r5,=DRAM_PA_START+0x01000000 /* Next chunk of DRAM */ ;\ +15: mov r6,r5 /* Build page table entry */ ;\ + ldr r7,=MMU_L2_TYPE_Small|MMU_AP_Any|MMU_Bufferable|MMU_Cacheable;\ + orr r6,r6,r7 ;\ + ldr r7,=MMU_PAGE_SIZE ;\ + str r6,[r2],#4 /* Next page */ ;\ + add r3,r3,r7 ;\ + add r5,r5,r7 ;\ + cmp r3,r4 /* End of DRAM? */ ;\ + beq 20f ;\ + sub r8,r8,#1 /* End of 1M section? */ ;\ + cmp r8,#0 ;\ + bne 12b /* Next page */ ;\ + b 10b /* Next section */ ;\ +20: #else -#err Invalid DRAM size selected -#endif - -#ifdef CYG_HAL_ARM_CL7111 // CL7111, 710 processor -#define MMU_INITIALIZE \ - ldr r1,=MMU_Control_Init ;\ - mcr MMU_CP,0,r1,MMU_Control,c0 /* MMU off */ ;\ - ldr r1,=MMU_BASE ;\ - mcr MMU_CP,0,r1,MMU_Base,c0 ;\ - mcr MMU_CP,0,r1,MMU_FlushTLB,c0,0 /* Invalidate TLB */ ;\ - mcr MMU_CP,0,r1,MMU_FlushIDC,c0,0 /* Invalidate Caches */ ;\ - ldr r1,=0xFFFFFFFF ;\ - mcr MMU_CP,0,r1,MMU_DomainAccess,c0 ;\ - ldr r2,=10f ;\ - ldr r1,=MMU_Control_Init|MMU_Control_M ;\ - mcr MMU_CP,0,r1,MMU_Control,c0 ;\ - mov pc,r2 /* Change address spaces */ ;\ - nop ;\ - nop ;\ - nop ;\ -10: -#else // EP7211, 720T processor -#define MMU_INITIALIZE ;\ - ldr r1,=MMU_Control_Init ;\ - mcr MMU_CP,0,r1,MMU_Control,c0 /* MMU off */ ;\ - ldr r1,=MMU_BASE ;\ - mcr MMU_CP,0,r1,MMU_Base,c0 ;\ - mcr MMU_CP,0,r1,MMU_TLB,c7,0 /* Invalidate TLB - 720 style */ ;\ - mcr MMU_CP,0,r1,MMU_FlushIDC,c0,0 /* Invalidate Caches */ ;\ - ldr r1,=0xFFFFFFFF ;\ - mcr MMU_CP,0,r1,MMU_DomainAccess,c0 ;\ - ldr r2,=10f ;\ - ldr r3,=__exception_handlers ;\ - sub r2,r2,r3 ;\ - ldr r3,=ROM0_LA_START ;\ - add r2,r2,r3 ;\ - ldr r1,=MMU_Control_Init|MMU_Control_M ;\ - mcr MMU_CP,0,r1,MMU_Control,c0 ;\ - mov pc,r2 /* Change address spaces */ ;\ - nop ;\ - nop ;\ - nop ;\ -10: +#err Invalid DRAM size select #endif -#define PLATFORM_SETUP1 \ -/* Initialize memory configuration */ ;\ - ldr r1,=MEMCFG1 ;\ - ldr r2,=0x8200A080 /* FIXME - what is this? */ ;\ - str r2,[r1] ;\ - ldr r1,=MEMCFG2 ;\ - ldr r2,=0xFEFC0000 ;\ - str r2,[r1] ;\ - ldr r1,=DRFPR ;\ - ldr r2,=0x81 /* DRAM refresh = 64KHz */ ;\ - strb r2,[r1] ;\ -/* Initialize MMU to create new memory map */ ;\ - ldr r1,=MMU_BASE ;\ - ldr r2,=PTE_BASE ;\ - MAP_DRAM ;\ -/* Nothing until PCMCIA0 */ ;\ - ldr r3,=0x3FF /* Page tables need 2K boundary */ ;\ - add r2,r2,r3 ;\ - ldr r3,=~0x3FF ;\ - and r2,r2,r3 ;\ - ldr r3,=(DRAM_LA_END+0x000FFFFF)&0xFFF00000 ;\ - ldr r4,=EXPANSION2_LA_START ;\ - ldr r5,=MMU_L1_TYPE_Fault ;\ - ldr r7,=MMU_SECTION_SIZE ;\ -10: str r5,[r1],#4 ;\ - add r3,r3,r7 ;\ - cmp r3,r4 ;\ - bne 10b ;\ -/* EXPANSION2, EXPANSION3, PCMCIA0, PCMCIA1 */ ;\ - ldr r3,=EXPANSION2_LA_START ;\ - ldr r4,=SRAM_LA_START ;\ - ldr r5,=EXPANSION2_PA ;\ - ldr r6,=MMU_L1_TYPE_Section|MMU_AP_Any ;\ - ldr r7,=MMU_SECTION_SIZE ;\ -10: orr r0,r5,r6 ;\ - str r0,[r1],#4 ;\ - add r5,r5,r7 ;\ - add r3,r3,r7 ;\ - cmp r3,r4 ;\ - bne 10b ;\ -/* SRAM */ ;\ - ldr r3,=SRAM_LA_START ;\ - ldr r4,=MMU_L1_TYPE_Page|MMU_DOMAIN(0) ;\ - orr r4,r4,r2 ;\ - str r4,[r1],#4 ;\ - ldr r4,=MMU_L2_TYPE_Small|MMU_AP_Any|MMU_Bufferable|MMU_Cacheable ;\ - orr r4,r3,r4 ;\ - str r4,[r2],#4 ;\ - ldr r3,=SRAM_LA_START+MMU_PAGE_SIZE ;\ - ldr r4,=SRAM_LA_START+MMU_SECTION_SIZE ;\ - ldr r5,=MMU_L2_TYPE_Fault ;\ - ldr r7,=MMU_PAGE_SIZE ;\ -10: str r5,[r2],#4 ;\ - add r3,r3,r7 ;\ - cmp r3,r4 ;\ - bne 10b ;\ - ldr r4,=IO_LA_START ;\ - ldr r5,=MMU_L1_TYPE_Fault ;\ - ldr r7,=MMU_SECTION_SIZE ;\ -20: str r5,[r1],#4 ;\ - add r3,r3,r7 ;\ - cmp r3,r4 ;\ - bne 20b ;\ -/* I/O */ ;\ - ldr r3,=0x3FF /* Page tables need 2K boundary */ ;\ - add r2,r2,r3 ;\ - ldr r3,=~0x3FF ;\ - and r2,r2,r3 ;\ - ldr r4,=MMU_L1_TYPE_Page|MMU_DOMAIN(0) ;\ - orr r4,r4,r2 ;\ - str r4,[r1],#4 ;\ - ldr r3,=IO_LA_START ;\ - ldr r4,=IO_LA_END ;\ - ldr r7,=MMU_PAGE_SIZE ;\ - ldr r5,=IO_PA|MMU_L2_TYPE_Small|MMU_AP_All ;\ -10: str r5,[r2],#4 ;\ - add r5,r5,r7 ;\ - add r3,r3,r7 ;\ - cmp r3,r4 ;\ - bne 10b ;\ - ldr r4,=IO_LA_START+MMU_SECTION_SIZE ;\ - ldr r5,=MMU_L2_TYPE_Fault ;\ - ldr r7,=MMU_PAGE_SIZE ;\ -10: str r5,[r2],#4 ;\ - add r3,r3,r7 ;\ - cmp r3,r4 ;\ - bne 10b ;\ - ldr r4,=LCD_LA_START ;\ - ldr r5,=MMU_L1_TYPE_Fault ;\ - ldr r7,=MMU_SECTION_SIZE ;\ -20: str r5,[r1],#4 ;\ - add r3,r3,r7 ;\ - cmp r3,r4 ;\ - bne 20b ;\ -/* LCD Buffer & Unmapped DRAM (holes and all) */ ;\ - ldr r3,=LCD_LA_START ;\ - ldr r4,=ROM0_LA_START ;\ - ldr r5,=LCD_PA ;\ - ldr r6,=MMU_L1_TYPE_Section|MMU_AP_Any|MMU_Bufferable|MMU_Cacheable ;\ - ldr r7,=MMU_SECTION_SIZE ;\ -10: orr r0,r5,r6 ;\ - str r0,[r1],#4 ;\ - add r5,r5,r7 ;\ - add r3,r3,r7 ;\ - cmp r3,r4 ;\ - bne 10b ;\ -/* ROM0 */ ;\ - ldr r3,=ROM0_LA_START ;\ - ldr r4,=ROM0_LA_END ;\ - ldr r5,=ROM0_PA ;\ - ldr r6,=MMU_L1_TYPE_Section|MMU_AP_Any|MMU_Cacheable ;\ - ldr r7,=MMU_SECTION_SIZE ;\ -10: orr r0,r5,r6 ;\ - str r0,[r1],#4 ;\ - add r5,r5,r7 ;\ - add r3,r3,r7 ;\ - cmp r3,r4 ;\ - bne 10b ;\ -/* ROM1 */ ;\ - ldr r3,=ROM1_LA_START ;\ - ldr r4,=ROM1_LA_END ;\ - ldr r5,=ROM1_PA ;\ - ldr r6,=MMU_L1_TYPE_Section|MMU_AP_Any ;\ - ldr r7,=MMU_SECTION_SIZE ;\ -10: orr r0,r5,r6 ;\ - str r0,[r1],#4 ;\ - add r5,r5,r7 ;\ - add r3,r3,r7 ;\ - cmp r3,r4 ;\ - bne 10b ;\ -/* Now initialize the MMU to use this new page table */ ;\ - MMU_INITIALIZE ;\ - ldr r2,=__exception_handlers ;\ - ldr r3,=ROM0_LA_START ;\ - cmp r2,r3 ;\ - beq 20f ;\ - ldr r4,=__rom_data_end ;\ -15: ;\ - ldr r0,[r3],#4 ;\ - str r0,[r2],#4 ;\ - cmp r2,r4 ;\ - bne 15b ;\ -20: +#define PLATFORM_SETUP1 \ + INIT_MEMORY_CONFIG ;\ +/* Initialize MMU to create new memory map */ ;\ + ldr r1,=MMU_BASE ;\ + ldr r2,=PTE_BASE ;\ + MAP_DRAM ;\ +/* Nothing until PCMCIA0 */ ;\ + ldr r3,=0x3FF /* Page tables need 2K boundary */ ;\ + add r2,r2,r3 ;\ + ldr r3,=~0x3FF ;\ + and r2,r2,r3 ;\ + ldr r3,=(DRAM_LA_END+0x000FFFFF)&0xFFF00000 ;\ + ldr r4,=EXPANSION2_LA_START ;\ + ldr r5,=MMU_L1_TYPE_Fault ;\ + ldr r7,=MMU_SECTION_SIZE ;\ +10: str r5,[r1],#4 ;\ + add r3,r3,r7 ;\ + cmp r3,r4 ;\ + bne 10b ;\ +/* EXPANSION2, EXPANSION3, PCMCIA0, PCMCIA1 */ ;\ + ldr r3,=EXPANSION2_LA_START ;\ + ldr r4,=SRAM_LA_START ;\ + ldr r5,=EXPANSION2_PA ;\ + ldr r6,=MMU_L1_TYPE_Section|MMU_AP_Any ;\ + ldr r7,=MMU_SECTION_SIZE ;\ +10: orr r0,r5,r6 ;\ + str r0,[r1],#4 ;\ + add r5,r5,r7 ;\ + add r3,r3,r7 ;\ + cmp r3,r4 ;\ + bne 10b ;\ +/* SRAM */ ;\ + ldr r3,=SRAM_LA_START ;\ + ldr r4,=MMU_L1_TYPE_Page|MMU_DOMAIN(0) ;\ + orr r4,r4,r2 ;\ + str r4,[r1],#4 ;\ + ldr r4,=MMU_L2_TYPE_Small|MMU_AP_Any|MMU_Bufferable|MMU_Cacheable;\ + orr r4,r3,r4 ;\ + str r4,[r2],#4 ;\ + ldr r3,=SRAM_LA_START+MMU_PAGE_SIZE ;\ + ldr r4,=SRAM_LA_START+MMU_SECTION_SIZE ;\ + ldr r5,=MMU_L2_TYPE_Fault ;\ + ldr r7,=MMU_PAGE_SIZE ;\ +10: str r5,[r2],#4 ;\ + add r3,r3,r7 ;\ + cmp r3,r4 ;\ + bne 10b ;\ + ldr r4,=IO_LA_START ;\ + ldr r5,=MMU_L1_TYPE_Fault ;\ + ldr r7,=MMU_SECTION_SIZE ;\ +20: str r5,[r1],#4 ;\ + add r3,r3,r7 ;\ + cmp r3,r4 ;\ + bne 20b ;\ +/* I/O */ ;\ + ldr r3,=0x3FF /* Page tables need 2K boundary */ ;\ + add r2,r2,r3 ;\ + ldr r3,=~0x3FF ;\ + and r2,r2,r3 ;\ + ldr r4,=MMU_L1_TYPE_Page|MMU_DOMAIN(0) ;\ + orr r4,r4,r2 ;\ + str r4,[r1],#4 ;\ + ldr r3,=IO_LA_START ;\ + ldr r4,=IO_LA_END ;\ + ldr r7,=MMU_PAGE_SIZE ;\ + ldr r5,=IO_PA|MMU_L2_TYPE_Small|MMU_AP_All ;\ +10: str r5,[r2],#4 ;\ + add r5,r5,r7 ;\ + add r3,r3,r7 ;\ + cmp r3,r4 ;\ + bne 10b ;\ + ldr r4,=IO_LA_START+MMU_SECTION_SIZE ;\ + ldr r5,=MMU_L2_TYPE_Fault ;\ + ldr r7,=MMU_PAGE_SIZE ;\ +10: str r5,[r2],#4 ;\ + add r3,r3,r7 ;\ + cmp r3,r4 ;\ + bne 10b ;\ + ldr r4,=LCD_LA_START ;\ + ldr r5,=MMU_L1_TYPE_Fault ;\ + ldr r7,=MMU_SECTION_SIZE ;\ +20: str r5,[r1],#4 ;\ + add r3,r3,r7 ;\ + cmp r3,r4 ;\ + bne 20b ;\ +/* LCD Buffer & Unmapped DRAM (holes and all) */ ;\ + ldr r3,=LCD_LA_START ;\ + ldr r4,=ROM0_LA_START ;\ + ldr r5,=LCD_PA ;\ + ldr r6,=MMU_L1_TYPE_Section|MMU_AP_Any \ + |MMU_Bufferable|MMU_Cacheable ;\ + ldr r7,=MMU_SECTION_SIZE ;\ +10: orr r0,r5,r6 ;\ + str r0,[r1],#4 ;\ + add r5,r5,r7 ;\ + add r3,r3,r7 ;\ + cmp r3,r4 ;\ + bne 10b ;\ +/* ROM0 */ ;\ + ldr r3,=ROM0_LA_START ;\ + ldr r4,=ROM0_LA_END ;\ + ldr r5,=ROM0_PA ;\ + ldr r6,=MMU_L1_TYPE_Section|MMU_AP_Any|MMU_Cacheable ;\ + ldr r7,=MMU_SECTION_SIZE ;\ +10: orr r0,r5,r6 ;\ + str r0,[r1],#4 ;\ + add r5,r5,r7 ;\ + add r3,r3,r7 ;\ + cmp r3,r4 ;\ + bne 10b ;\ +/* ROM1 */ ;\ + ldr r3,=ROM1_LA_START ;\ + ldr r4,=ROM1_LA_END ;\ + ldr r5,=ROM1_PA ;\ + ldr r6,=MMU_L1_TYPE_Section|MMU_AP_Any ;\ + ldr r7,=MMU_SECTION_SIZE ;\ +10: orr r0,r5,r6 ;\ + str r0,[r1],#4 ;\ + add r5,r5,r7 ;\ + add r3,r3,r7 ;\ + cmp r3,r4 ;\ + bne 10b ;\ +/* Now initialize the MMU to use this new page table */ ;\ + ldr r1,=MMU_BASE ;\ + MMU_INITIALIZE ;\ + RELOCATE_TEXT_SEGMENT +#endif // CYGSEM_HAL_STATIC_MMU_TABLES -#else +#else // CYGSEM_HAL_INSTALL_MMU_TABLES #define PLATFORM_SETUP1 #endif - /*---------------------------------------------------------------------------*/ /* end of hal_platform_setup.h */ #endif /* CYGONCE_HAL_PLATFORM_SETUP_H */
--- a/packages/hal/arm/edb7xxx/current/include/pkgconf/hal_arm_edb7xxx.h +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/hal_arm_edb7xxx.h @@ -222,6 +222,18 @@ #define CYGNUM_HAL_RTC_DENOMINATOR 100 #define CYGNUM_HAL_RTC_PERIOD 5120 // Assumes 512KHz clock +//--------------------------------------------------------------------------- +// Platform information - descriptive only + +#ifdef __CL7111 +#define HAL_PLATFORM_CPU "ARM 710C" +#define HAL_PLATFORM_BOARD "CL-PS7111" +#else +#define HAL_PLATFORM_CPU "ARM 720T" +#define HAL_PLATFORM_BOARD "EDB7211" +#endif +#define HAL_PLATFORM_EXTRA "" + /* -------------------------------------------------------------------*/ #endif /* CYGONCE_PKGCONF_HAL_ARM_EDB7XXX_H */ /* EOF hal_arm_edb7xxx.h */
--- a/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_cl7111_ram.h +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_cl7111_ram.h @@ -1,6 +1,6 @@ // eCos memory layout - Wed Nov 17 08:08:48 1999 -// This is a generated file - do not edit +// This is a generated file - changes will be lost if ConfigTool(MLT) is run #include <cyg/infra/cyg_type.h> #include <stddef.h>
--- a/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_cl7111_rom.h +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_cl7111_rom.h @@ -1,6 +1,6 @@ // eCos memory layout - Wed Nov 17 08:10:54 1999 -// This is a generated file - do not edit +// This is a generated file - changes will be lost if ConfigTool(MLT) is run #include <cyg/infra/cyg_type.h> #include <stddef.h>
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_cl7111_stubs.h @@ -0,0 +1,13 @@ +// eCos memory layout - Wed Nov 24 10:43:23 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0x1000) +#define CYGMEM_REGION_ram_SIZE (0x7000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0xf0028000) +#define CYGMEM_REGION_rom_SIZE (0x40000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
--- a/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_ram.h +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_ram.h @@ -1,6 +1,6 @@ // eCos memory layout - Wed Oct 27 13:28:21 1999 -// This is a generated file - do not edit +// This is a generated file - changes will be lost if ConfigTool(MLT) is run #include <cyg/infra/cyg_type.h> #include <stddef.h>
--- a/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_rom.h +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_rom.h @@ -1,16 +1,22 @@ -// eCos memory layout - Wed Oct 27 13:34:16 1999 +// eCos memory layout - Mon Nov 22 15:15:11 1999 -// This is a generated file - do not edit +// This is a generated file - changes will be lost if ConfigTool(MLT) is run #include <cyg/infra/cyg_type.h> #include <stddef.h> #define CYGMEM_REGION_ram (0) -#define CYGMEM_REGION_ram_SIZE (0x00FD7000) +#define CYGMEM_REGION_ram_SIZE (0xfd7000) #define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_sram (0x60000000) +#define CYGMEM_REGION_sram_SIZE (0x9c00) +#define CYGMEM_REGION_sram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) #define CYGMEM_REGION_rom (0xe0000000) #define CYGMEM_REGION_rom_SIZE (0x800000) #define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) extern char CYG_LABEL_NAME (_reserved) []; #define CYGMEM_SECTION_reserved (CYG_LABEL_NAME (_reserved)) #define CYGMEM_SECTION_reserved_SIZE (0x1000 - (size_t) CYG_LABEL_NAME (_reserved)) +extern char CYG_LABEL_NAME (_sram) []; +#define CYGMEM_SECTION_sram (CYG_LABEL_NAME (_sram)) +#define CYGMEM_SECTION_sram_SIZE (0x60009c00 - (size_t) CYG_LABEL_NAME (_sram))
--- a/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_rom.ldi +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_rom.ldi @@ -1,10 +1,11 @@ -// eCos memory layout - Wed Oct 27 13:34:16 1999 +// eCos memory layout - Mon Nov 22 15:15:11 1999 // This is a generated file - do not edit MEMORY { - ram : ORIGIN = 0, LENGTH = 0x00FD7000 + ram : ORIGIN = 0, LENGTH = 0xfd7000 + sram : ORIGIN = 0x60000000, LENGTH = 0x9c00 rom : ORIGIN = 0xe0000000, LENGTH = 0x800000 } @@ -18,8 +19,10 @@ SECTIONS SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_mmu_tables (rom, ALIGN (0x4000), LMA_EQ_VMA) __reserved = 0; - SECTION_data (ram, 0x1000, FOLLOWING (.gcc_except_table)) + SECTION_data (ram, 0x1000, FOLLOWING (.mmu_tables)) SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) + __sram = 0x60000000; SECTIONS_END }
--- a/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_rom.mlt +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_rom.mlt @@ -1,13 +1,16 @@ version 0 region ram 0 fd7000 0 ! +region sram 60000000 9c00 0 ! region rom e0000000 800000 1 !This is ROM bank 0, physical address 0x00000000.When running eCos, this space is remapped to 0xE0000000. section reserved 0 1 0 0 1 0 1 0 0 0 ! section data 0 1 1 1 1 1 0 0 1000 bss ! section bss 0 4 0 1 0 0 0 0 ! +section sram 0 1 0 0 1 0 1 0 60000000 60000000 ! section rom_vectors 0 1 0 1 1 1 1 1 e0000000 e0000000 text text ! section text 0 1 0 1 0 1 0 1 fini fini ! section fini 0 1 0 1 0 1 0 1 rodata rodata ! section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! -section gcc_except_table 0 1 0 1 0 0 0 1 data ! +section gcc_except_table 0 1 0 1 0 1 0 1 mmu_tables mmu_tables ! +section mmu_tables 0 4000 0 1 0 0 0 1 data !
--- a/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_stubs.h +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_stubs.h @@ -1,12 +1,12 @@ -// eCos memory layout - Wed Oct 27 13:37:57 1999 +// eCos memory layout - Mon Nov 22 15:16:19 1999 -// This is a generated file - do not edit +// This is a generated file - changes will be lost if ConfigTool(MLT) is run #include <cyg/infra/cyg_type.h> #include <stddef.h> #define CYGMEM_REGION_ram (0) -#define CYGMEM_REGION_ram_SIZE (0x00FD7000) +#define CYGMEM_REGION_ram_SIZE (0xfd7000) #define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) #define CYGMEM_REGION_rom (0xe0000000) #define CYGMEM_REGION_rom_SIZE (0x800000)
--- a/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_stubs.ldi +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_stubs.ldi @@ -1,10 +1,10 @@ -// eCos memory layout - Wed Oct 27 13:37:57 1999 +// eCos memory layout - Mon Nov 22 15:16:19 1999 // This is a generated file - do not edit MEMORY { - ram : ORIGIN = 0, LENGTH = 0x00FD7000 + ram : ORIGIN = 0, LENGTH = 0xfd7000 rom : ORIGIN = 0xe0000000, LENGTH = 0x800000 } @@ -18,8 +18,9 @@ SECTIONS SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA) SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA) SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) + SECTION_mmu_tables (rom, ALIGN (0x4000), LMA_EQ_VMA) __reserved = 0; - SECTION_data (ram, 0x1000, FOLLOWING (.gcc_except_table)) + SECTION_data (ram, 0x1000, FOLLOWING (.mmu_tables)) SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA) SECTIONS_END }
--- a/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_stubs.mlt +++ b/packages/hal/arm/edb7xxx/current/include/pkgconf/mlt_arm_edb7211_stubs.mlt @@ -10,4 +10,5 @@ section fini 0 1 0 1 0 1 0 1 rodata roda section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 ! section rodata1 0 1 0 1 0 1 0 1 fixup fixup ! section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table ! -section gcc_except_table 0 1 0 1 0 0 0 1 data ! +section gcc_except_table 0 1 0 1 0 1 0 1 mmu_tables mmu_tables ! +section mmu_tables 0 4000 0 1 0 0 0 1 data !
--- a/packages/hal/arm/edb7xxx/current/misc/STUBS_config +++ b/packages/hal/arm/edb7xxx/current/misc/STUBS_config @@ -1,6 +1,9 @@ #! /bin/sh -# usage: STUBS_config <repository> [edb7211 | cl7111] +# usage: STUBS_config <repository> <platform> +# where <platform> is one of: +# edb7211 +# cl7111 if [ "$2"x = "x" ]; then EDB7xxx="edb7211" @@ -25,7 +28,10 @@ fi --disable CYGPKG_IO_SERIAL --disable CYGPKG_DEVICES_WALLCLOCK \ --disable CYGPKG_DEVICES_WATCHDOG --disable-cygmon -patch <<END_OF_PATCH -p0 +patch <<END_OF_PATCHES -p0 + +// This patch enables GDB stub support + --- pkgconf/hal.h~ Thu Jul 8 08:26:44 1999 +++ pkgconf/hal.h Wed Jul 28 10:51:07 1999 @@ -369,10 +369,10 @@ @@ -42,4 +48,19 @@ patch <<END_OF_PATCH -p0 /* * NOTE: -END_OF_PATCH + +// This patch selects statis MMU tables, in ROM + +--- pkgconf/hal.h~ Mon Nov 22 07:42:33 1999 ++++ pkgconf/hal.h Mon Nov 22 08:33:32 1999 +@@ -348,7 +348,7 @@ + }}CFG_DATA */ + + #define CYGSEM_HAL_INSTALL_MMU_TABLES +-#undef CYGSEM_HAL_STATIC_MMU_TABLES ++#define CYGSEM_HAL_STATIC_MMU_TABLES + + /* --------------------------------------------------------------------- + * Options related to source-level debugging and diagnostics. + +END_OF_PATCHES
--- a/packages/hal/arm/edb7xxx/current/src/edb7xxx_misc.c +++ b/packages/hal/arm/edb7xxx/current/src/edb7xxx_misc.c @@ -133,7 +133,7 @@ void hal_clock_reset(cyg_uint32 vector, // Temporary fix for DRAM starvation problem if (CYGHWR_HAL_ARM_EDB7XXX_PROCESSOR_CLOCK > 37000) { int i; - for (i = 0; i < (CYGHWR_HAL_ARM_EDB7XXX_PROCESSOR_CLOCK*2)/50; i++) ; // approx 200 us + for (i = 0; i < (CYGHWR_HAL_ARM_EDB7XXX_PROCESSOR_CLOCK*2)/30; i++) ; // approx 250 us } #endif }
--- a/packages/hal/arm/edb7xxx/current/src/hal_diag.c +++ b/packages/hal/arm/edb7xxx/current/src/hal_diag.c @@ -82,7 +82,7 @@ #if defined(CYG_HAL_STARTUP_ROM) && !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) #define HAL_DIAG_USES_HARDWARE #else -#if defined(CYGDGB_HAL_DIAG_DISABLE_GDB_PROTOCOL) +#if defined(CYGDBG_HAL_DIAG_DISABLE_GDB_PROTOCOL) #define HAL_DIAG_USES_HARDWARE #elif CYGHWR_HAL_ARM_EDB7XXX_DIAG_PORT != CYGHWR_HAL_ARM_EDB7XXX_GDB_PORT #define HAL_DIAG_USES_HARDWARE @@ -141,19 +141,23 @@ void hal_diag_init(void) #endif } +#ifdef DEBUG_DIAG #ifndef CYG_HAL_STARTUP_ROM #define DIAG_BUFSIZE 2048 static char diag_buffer[DIAG_BUFSIZE]; static int diag_bp = 0; #endif +#endif void hal_diag_write_char(char c) { hal_diag_init(); +#ifdef DEBUG_DIAG #ifndef CYG_HAL_STARTUP_ROM diag_buffer[diag_bp++] = c; if (diag_bp == sizeof(diag_buffer)) diag_bp = 0; #endif +#endif hal_diag_write_char_serial(c); }
--- a/packages/hal/arm/pid/current/ChangeLog +++ b/packages/hal/arm/pid/current/ChangeLog @@ -1,11 +1,29 @@ +1999-11-25 Jonathan Larmour <jlarmour@cygnus.co.uk> + + * include/pkgconf/hal_arm_pid.h: + Allow selection of big-endian mode + + * src/hal_diag.c: Conditionalize def of diag_buffer for only when it's + explicitly wanted and someone hacks the code + (hal_diag_write_char): Likewise + +1999-11-25 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/mlt_arm_pid_ram.h: + * include/pkgconf/mlt_arm_pid_rom.h: + * include/pkgconf/mlt_arm_pidBE_rom.h: + * include/pkgconf/mlt_arm_pidBE_ram.h: Update 'do not edit' strings. + + * include/pkgconf/mlt_arm_pid_stubs.h: + * include/pkgconf/mlt_arm_pidBE_stubs.h: + * include/pkgconf/mlt_arm_pid9_stubs.h: + * include/pkgconf/mlt_arm_pid9_rom.h: + * include/pkgconf/mlt_arm_pid9_ram.h: New file(s). + 1999-11-09 Gary Thomas <gthomas@cygnus.co.uk> * include/pkgconf/mlt_arm_pidBE_ram.h: * include/pkgconf/mlt_arm_pidBE_rom.h: - * include/pkgconf/mlt_arm_pidTBE_ram.h: - * include/pkgconf/mlt_arm_pidTBE_rom.h: - * include/pkgconf/mlt_arm_pidT_ram.h: - * include/pkgconf/mlt_arm_pidT_rom.h: * include/pkgconf/mlt_arm_pid_ram.h: * include/pkgconf/mlt_arm_pid_rom.h: New file(s). @@ -13,14 +31,6 @@ 1999-11-09 Gary Thomas <gthomas@cygnus * include/pkgconf/mlt_arm_pidBE_ram.mlt: * include/pkgconf/mlt_arm_pidBE_rom.ldi: * include/pkgconf/mlt_arm_pidBE_rom.mlt: - * include/pkgconf/mlt_arm_pidTBE_ram.ldi: - * include/pkgconf/mlt_arm_pidTBE_ram.mlt: - * include/pkgconf/mlt_arm_pidTBE_rom.ldi: - * include/pkgconf/mlt_arm_pidTBE_rom.mlt: - * include/pkgconf/mlt_arm_pidT_ram.ldi: - * include/pkgconf/mlt_arm_pidT_ram.mlt: - * include/pkgconf/mlt_arm_pidT_rom.ldi: - * include/pkgconf/mlt_arm_pidT_rom.mlt: * include/pkgconf/mlt_arm_pid_ram.ldi: * include/pkgconf/mlt_arm_pid_ram.mlt: * include/pkgconf/mlt_arm_pid_rom.ldi:
--- a/packages/hal/arm/pid/current/include/pkgconf/hal_arm_pid.h +++ b/packages/hal/arm/pid/current/include/pkgconf/hal_arm_pid.h @@ -65,6 +65,16 @@ The PID board comes with an ARM7 CPU as standard." } + cdl_option CYGHWR_HAL_ARM_PID_ARM7BE { + display "ARM PID evaluation board with ARM7 CPU (big-endian mode)" + parent CYGPKG_HAL_ARM_PID + platform pidBE + type radio + description " + The PID board comes with an ARM7 CPU which can be operated in big-endian + mode instead of little-endian mode." + } + cdl_option CYGHWR_HAL_ARM_PID_ARM9 { display "ARM PID evaluation board with ARM9 CPU" parent CYGPKG_HAL_ARM_PID
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid9_ram.h @@ -0,0 +1,13 @@ +// eCos memory layout - Tue Nov 09 06:57:37 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x80000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +extern char CYG_LABEL_NAME (_reserved) []; +#define CYGMEM_SECTION_reserved (CYG_LABEL_NAME (_reserved)) +#define CYGMEM_SECTION_reserved_SIZE (0x4000)
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid9_rom.h @@ -0,0 +1,16 @@ +// eCos memory layout - Tue Nov 09 06:59:24 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x80000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0x4000000) +#define CYGMEM_REGION_rom_SIZE (0x80000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +extern char CYG_LABEL_NAME (_reserved) []; +#define CYGMEM_SECTION_reserved (CYG_LABEL_NAME (_reserved)) +#define CYGMEM_SECTION_reserved_SIZE (0x800)
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid9_stubs.h @@ -0,0 +1,13 @@ +// eCos memory layout - Wed Nov 24 10:37:15 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0x800) +#define CYGMEM_REGION_ram_SIZE (0x3800) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0x4000000) +#define CYGMEM_REGION_rom_SIZE (0x80000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
--- a/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pidBE_ram.h +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pidBE_ram.h @@ -1,6 +1,6 @@ // eCos memory layout - Tue Nov 09 06:57:37 1999 -// This is a generated file - do not edit +// This is a generated file - changes will be lost if ConfigTool(MLT) is run #include <cyg/infra/cyg_type.h> #include <stddef.h>
--- a/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pidBE_rom.h +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pidBE_rom.h @@ -1,6 +1,6 @@ // eCos memory layout - Tue Nov 09 06:59:24 1999 -// This is a generated file - do not edit +// This is a generated file - changes will be lost if ConfigTool(MLT) is run #include <cyg/infra/cyg_type.h> #include <stddef.h>
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pidBE_stubs.h @@ -0,0 +1,13 @@ +// eCos memory layout - Wed Nov 24 10:37:15 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0x800) +#define CYGMEM_REGION_ram_SIZE (0x3800) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0x4000000) +#define CYGMEM_REGION_rom_SIZE (0x80000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
--- a/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_ram.h +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_ram.h @@ -1,6 +1,6 @@ // eCos memory layout - Tue Nov 09 06:57:37 1999 -// This is a generated file - do not edit +// This is a generated file - changes will be lost if ConfigTool(MLT) is run #include <cyg/infra/cyg_type.h> #include <stddef.h>
--- a/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_rom.h +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_rom.h @@ -1,6 +1,6 @@ // eCos memory layout - Tue Nov 09 06:59:24 1999 -// This is a generated file - do not edit +// This is a generated file - changes will be lost if ConfigTool(MLT) is run #include <cyg/infra/cyg_type.h> #include <stddef.h>
new file mode 100644 --- /dev/null +++ b/packages/hal/arm/pid/current/include/pkgconf/mlt_arm_pid_stubs.h @@ -0,0 +1,13 @@ +// eCos memory layout - Wed Nov 24 10:37:15 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0x800) +#define CYGMEM_REGION_ram_SIZE (0x3800) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0x4000000) +#define CYGMEM_REGION_rom_SIZE (0x80000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
--- a/packages/hal/arm/pid/current/src/hal_diag.c +++ b/packages/hal/arm/pid/current/src/hal_diag.c @@ -193,6 +193,7 @@ void hal_diag_init(void) while (*msg) hal_diag_write_char(*msg++); } +#ifdef DEBUG_DIAG #if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) #define DIAG_BUFSIZE 32 #else @@ -200,6 +201,7 @@ void hal_diag_init(void) #endif static char diag_buffer[DIAG_BUFSIZE]; static int diag_bp = 0; +#endif void hal_diag_write_char(char c) { @@ -211,8 +213,10 @@ void hal_diag_write_char(char c) } while ((lsr & SIO_LSR_THRE) == 0); HAL_WRITE_UINT8 (CYG_DEVICE_SERIAL_RS232_16550_THR, c); +#ifdef DEBUG_DIAG diag_buffer[diag_bp++] = c; if (diag_bp == DIAG_BUFSIZE) diag_bp = 0; +#endif } void hal_diag_read_char(char *c)
--- a/packages/hal/common/current/ChangeLog +++ b/packages/hal/common/current/ChangeLog @@ -1,3 +1,9 @@ +1999-11-20 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/hal.h (CYGSEM_HAL_INSTALL_MMU_TABLES): + (CYGSEM_HAL_STATIC_MMU_TABLES): New options to control MMU table + flavour and placement. + 1999-11-15 Jonathan Larmour <jlarmour@cygnus.co.uk> * include/dbg-threads-api.h, include/generic-stub.h,
--- a/packages/hal/common/current/include/pkgconf/hal.h +++ b/packages/hal/common/current/include/pkgconf/hal.h @@ -111,7 +111,7 @@ cdl_option CYGDBG_HAL_DIAG_DISABLE_GDB_PROTOCOL { display "Disable GDB protocol for diagnostic output" - parent CYGPKG_HAL + parent CYGPKG_HAL_COMMON description " This option forces diagnostic output to not use the GDB protocol. Most programs will use the GDB protocol for @@ -323,6 +323,33 @@ #undef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG +/* {{CFG_DATA + + cdl_option CYGSEM_HAL_INSTALL_MMU_TABLES { + display "Install MMU tables." + description "This option controls whether this application installs + it's own Memory Management Unit (MMU) tables, or relies on the + existing environment to run." + type boolean + parent CYGPKG_HAL_COMMON + } + + cdl_option CYGSEM_HAL_STATIC_MMU_TABLES { + display "Use static MMU tables." + description "This option defines an environment where any Memory + Management Unit (MMU) tables are constant. Normally used by ROM + based environments, this provides a way to save RAM usage which + would otherwise be required for these tables." + type boolean + requires CYGSEM_HAL_INSTALL_MMU_TABLES + parent CYGPKG_HAL_COMMON + } + + }}CFG_DATA */ + +#define CYGSEM_HAL_INSTALL_MMU_TABLES +#undef CYGSEM_HAL_STATIC_MMU_TABLES + /* --------------------------------------------------------------------- * Options related to source-level debugging and diagnostics.
--- a/packages/hal/i386/linux/current/ChangeLog +++ b/packages/hal/i386/linux/current/ChangeLog @@ -1,3 +1,7 @@ +1999-11-25 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/mlt_i386_linux_ram.h: New file(s). + 1999-10-05 Jonathan Larmour <jlarmour@cygnus.co.uk> * src/linux_misc.c: Fix some really minor spelling typos
new file mode 100644 --- /dev/null +++ b/packages/hal/i386/linux/current/include/pkgconf/mlt_i386_linux_ram.h @@ -0,0 +1,10 @@ +// eCos memory layout - Wed Nov 24 12:01:42 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x800000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
--- a/packages/hal/mips/jmr3904/current/ChangeLog +++ b/packages/hal/mips/jmr3904/current/ChangeLog @@ -1,3 +1,8 @@ +1999-11-25 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/mlt_mips_tx39_jmr3904_rom.h: + * include/pkgconf/mlt_mips_tx39_jmr3904_ram.h: New file(s). + 1999-10-29 Nick Garnett <nickg@cygnus.co.uk> * include/plf_intr.h:
new file mode 100644 --- /dev/null +++ b/packages/hal/mips/jmr3904/current/include/pkgconf/mlt_mips_tx39_jmr3904_ram.h @@ -0,0 +1,10 @@ +// eCos memory layout - Wed Nov 24 11:14:15 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0x80008000) +#define CYGMEM_REGION_ram_SIZE (0x78000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
new file mode 100644 --- /dev/null +++ b/packages/hal/mips/jmr3904/current/include/pkgconf/mlt_mips_tx39_jmr3904_rom.h @@ -0,0 +1,13 @@ +// eCos memory layout - Wed Nov 24 11:15:31 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0x80000200) +#define CYGMEM_REGION_ram_SIZE (0x7fe00) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0xbfc00000) +#define CYGMEM_REGION_rom_SIZE (0x80000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
--- a/packages/hal/mips/sim/current/ChangeLog +++ b/packages/hal/mips/sim/current/ChangeLog @@ -1,3 +1,8 @@ +1999-11-25 Jonathan Larmour <jlarmour@cygnus.co.uk> + + * include/pkgconf/mlt_mips_tx39_sim_ram.h: + Add + 1999-08-19 Nick Garnett <nickg@cygnus.co.uk> * include/plf_io.h: Added this file to match other platforms.
new file mode 100644 --- /dev/null +++ b/packages/hal/mips/sim/current/include/pkgconf/mlt_mips_tx39_sim_ram.h @@ -0,0 +1,10 @@ +// eCos memory layout - Thu Nov 25 22:16:12 1999 + +// This is a generated file - do not edit + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0x80000000) +#define CYGMEM_REGION_ram_SIZE (0x80000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
--- a/packages/hal/mn10300/sim/current/ChangeLog +++ b/packages/hal/mn10300/sim/current/ChangeLog @@ -1,3 +1,7 @@ +1999-11-25 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/mlt_mn10300_am31_sim_ram.h: New file. + 1999-09-09 Jonathan Larmour <jlarmour@cygnus.co.uk> * src/plf_misc.c: New file.
new file mode 100644 --- /dev/null +++ b/packages/hal/mn10300/sim/current/include/pkgconf/mlt_mn10300_am31_sim_ram.h @@ -0,0 +1,10 @@ +// eCos memory layout - Wed Nov 24 13:10:23 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0x48000000) +#define CYGMEM_REGION_ram_SIZE (0x200000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
--- a/packages/hal/mn10300/stdeval1/current/ChangeLog +++ b/packages/hal/mn10300/stdeval1/current/ChangeLog @@ -1,3 +1,8 @@ +1999-11-25 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/mlt_mn10300_am31_stdeval1_rom.h: + * include/pkgconf/mlt_mn10300_am31_stdeval1_ram.h: New file(s). + 1999-09-07 Jesper Skov <jskov@cygnus.co.uk> * include/plf_stub.h: Include proper config header file.
new file mode 100644 --- /dev/null +++ b/packages/hal/mn10300/stdeval1/current/include/pkgconf/mlt_mn10300_am31_stdeval1_ram.h @@ -0,0 +1,16 @@ +// eCos memory layout - Wed Nov 24 11:23:10 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0x48008000) +#define CYGMEM_REGION_ram_SIZE (0x1f8000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +/* */ +/* */ +/* */ +/* */ +/* {{CFG_DATA */ +/* }}CFG_DATA */
new file mode 100644 --- /dev/null +++ b/packages/hal/mn10300/stdeval1/current/include/pkgconf/mlt_mn10300_am31_stdeval1_rom.h @@ -0,0 +1,17 @@ +// eCos memory layout - Wed Nov 24 12:53:47 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_rom (0x40000000) +#define CYGMEM_REGION_rom_SIZE (0x80000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +#define CYGMEM_REGION_ram (0x48000000) +#define CYGMEM_REGION_ram_SIZE (0x200000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +/* */ +/* */ +/* {{CFG_DATA */ +/* }}CFG_DATA */
--- a/packages/hal/powerpc/cogent/current/ChangeLog +++ b/packages/hal/powerpc/cogent/current/ChangeLog @@ -1,3 +1,9 @@ +1999-11-25 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/mlt_powerpc_cogent_stubs.h: + * include/pkgconf/mlt_powerpc_cogent_rom.h: + * include/pkgconf/mlt_powerpc_cogent_ram.h: New file(s). + 1999-09-02 Jesper Skov <jskov@cygnus.co.uk> * misc/STUBS_config: Added.
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/cogent/current/include/pkgconf/mlt_powerpc_cogent_ram.h @@ -0,0 +1,10 @@ +// eCos memory layout - Wed Nov 24 15:29:29 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x800000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/cogent/current/include/pkgconf/mlt_powerpc_cogent_rom.h @@ -0,0 +1,13 @@ +// eCos memory layout - Wed Nov 24 11:39:14 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0x2000) +#define CYGMEM_REGION_ram_SIZE (0x7fe000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0xfff00000) +#define CYGMEM_REGION_rom_SIZE (0x40000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/cogent/current/include/pkgconf/mlt_powerpc_cogent_stubs.h @@ -0,0 +1,13 @@ +// eCos memory layout - Wed Nov 24 11:40:07 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0x700000) +#define CYGMEM_REGION_ram_SIZE (0x100000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0xfff00000) +#define CYGMEM_REGION_rom_SIZE (0x40000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
--- a/packages/hal/powerpc/fads/current/ChangeLog +++ b/packages/hal/powerpc/fads/current/ChangeLog @@ -1,3 +1,8 @@ +1999-11-25 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/mlt_powerpc_fads_rom.h: + * include/pkgconf/mlt_powerpc_fads_ram.h: New file(s). + 1999-09-02 Hugo Tyson <hmt@cygnus.co.uk> * src/hal_aux.c (CYGARC_MEMDESC_TABLE): Define a non-empty table
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/fads/current/include/pkgconf/mlt_powerpc_fads_ram.h @@ -0,0 +1,10 @@ +// eCos memory layout - Wed Nov 24 15:24:30 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x800000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/fads/current/include/pkgconf/mlt_powerpc_fads_rom.h @@ -0,0 +1,19 @@ +// eCos memory layout - Wed Nov 24 11:43:46 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0x100000) +#define CYGMEM_REGION_ram_SIZE (0x700000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0x2800000) +#define CYGMEM_REGION_rom_SIZE (0x40000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +/* */ +/* */ +/* */ +/* */ +/* {{CFG_DATA */ +/* }}CFG_DATA */
--- a/packages/hal/powerpc/mbx/current/ChangeLog +++ b/packages/hal/powerpc/mbx/current/ChangeLog @@ -1,3 +1,8 @@ +1999-11-25 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/mlt_powerpc_mbx_rom.h: + * include/pkgconf/mlt_powerpc_mbx_ram.h: New file(s). + 1999-10-22 Hugo Tyson <hmt@cygnus.co.uk> * src/hal_diag.c (hal_diag_write_char): Call new hal_stub.h macro
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/mbx/current/include/pkgconf/mlt_powerpc_mbx_ram.h @@ -0,0 +1,10 @@ +// eCos memory layout - Wed Nov 24 11:47:54 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0x10000) +#define CYGMEM_REGION_ram_SIZE (0x3f0000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/mbx/current/include/pkgconf/mlt_powerpc_mbx_rom.h @@ -0,0 +1,13 @@ +// eCos memory layout - Wed Nov 24 11:49:32 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0x2000) +#define CYGMEM_REGION_ram_SIZE (0x3fe000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) +#define CYGMEM_REGION_rom (0xfe000000) +#define CYGMEM_REGION_rom_SIZE (0x800000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
--- a/packages/hal/powerpc/sim/current/ChangeLog +++ b/packages/hal/powerpc/sim/current/ChangeLog @@ -1,3 +1,7 @@ +1999-11-25 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/mlt_powerpc_sim_ram.h: New file. + 1999-09-23 Jonathan Larmour <jlarmour@cygnus.co.uk> * runtime/tree: Delete. Now obsolete.
new file mode 100644 --- /dev/null +++ b/packages/hal/powerpc/sim/current/include/pkgconf/mlt_powerpc_sim_ram.h @@ -0,0 +1,10 @@ +// eCos memory layout - Wed Nov 24 11:51:07 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0) +#define CYGMEM_REGION_ram_SIZE (0x100000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
--- a/packages/hal/sparclite/sim/current/ChangeLog +++ b/packages/hal/sparclite/sim/current/ChangeLog @@ -1,3 +1,7 @@ +1999-11-25 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/mlt_sparclite_sim_ram.h: New file. + 1999-10-13 Hugo Tyson <hmt@cygnus.co.uk> * include/pkgconf/hal_sparclite_sim.h: Add define of
new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sim/current/include/pkgconf/mlt_sparclite_sim_ram.h @@ -0,0 +1,10 @@ +// eCos memory layout - Wed Nov 24 12:00:24 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0x2000000) +#define CYGMEM_REGION_ram_SIZE (0x80000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
--- a/packages/hal/sparclite/sleb/current/ChangeLog +++ b/packages/hal/sparclite/sleb/current/ChangeLog @@ -1,3 +1,8 @@ +1999-11-25 Gary Thomas <gthomas@cygnus.co.uk> + + * include/pkgconf/mlt_sparclite_sleb_rom.h: + * include/pkgconf/mlt_sparclite_sleb_ram.h: New file(s). + 1999-10-14 John Dallaway <jld@cygnus.co.uk> * include/pkgconf/mlt_sparclite_sleb_ram.mlt,
new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sleb/current/include/pkgconf/mlt_sparclite_sleb_ram.h @@ -0,0 +1,10 @@ +// eCos memory layout - Wed Nov 24 11:58:30 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_ram (0x4010000) +#define CYGMEM_REGION_ram_SIZE (0x3f0000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
new file mode 100644 --- /dev/null +++ b/packages/hal/sparclite/sleb/current/include/pkgconf/mlt_sparclite_sleb_rom.h @@ -0,0 +1,13 @@ +// eCos memory layout - Wed Nov 24 11:59:23 1999 + +// This is a generated file - changes will be lost if ConfigTool(MLT) is run + +#include <cyg/infra/cyg_type.h> +#include <stddef.h> + +#define CYGMEM_REGION_rom (0) +#define CYGMEM_REGION_rom_SIZE (0x20000) +#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) +#define CYGMEM_REGION_ram (0x4000000) +#define CYGMEM_REGION_ram_SIZE (0x400000) +#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
--- a/packages/infra/current/ChangeLog +++ b/packages/infra/current/ChangeLog @@ -1,3 +1,7 @@ +1999-11-26 Gary Thomas <gthomas@cygnus.co.uk> + + * include/cyg_type.h: Add MLT symbols CYGMEM_REGION_ATTR_R/W. + 1999-05-14 Hugo Tyson <hmt@cygnus.co.uk> * include/cyg_type.h (CYG_INIT_COMPAT): add a new init priority
--- a/packages/infra/current/include/cyg_type.h +++ b/packages/infra/current/include/cyg_type.h @@ -325,5 +325,12 @@ typedef cyg_haladdrword CYG_ADDRWORD; #endif // ------------------------------------------------------------------------- +// Various "flavours" of memory regions that can be described by the +// Memory Layout Tool (MLT). + +#define CYGMEM_REGION_ATTR_R 0x01 // Region can be read +#define CYGMEM_REGION_ATTR_W 0x02 // Region can be written + +// ------------------------------------------------------------------------- #endif // CYGONCE_INFRA_CYG_TYPE_H multiple inclusion protection // EOF cyg_type.h
--- a/packages/io/serial/current/ChangeLog +++ b/packages/io/serial/current/ChangeLog @@ -1,3 +1,7 @@ +1999-11-19 Gary Thomas <gthomas@cygnus.co.uk> + + * src/powerpc/quicc_smc_serial.c: Channel select for SMC2 was wrong. + 1999-10-26 Jesper Skov <jskov@cygnus.co.uk> * src/arm/pid_serial.h: Added BE support.
--- a/packages/io/serial/current/src/powerpc/quicc_smc_serial.c +++ b/packages/io/serial/current/src/powerpc/quicc_smc_serial.c @@ -166,7 +166,7 @@ DEVTAB_ENTRY(quicc_smc_serial_io1, #ifdef CYGPKG_IO_SERIAL_POWERPC_QUICC_SMC_SMC2 static quicc_smc_serial_info quicc_smc_serial_info2 = { - 0xB0, // Channel indicator + 0xD0, // Channel indicator CYGNUM_HAL_INTERRUPT_CPM_SMC2_PIP // interrupt }; #if CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_BUFSIZE > 0
--- a/packages/kernel/current/ChangeLog +++ b/packages/kernel/current/ChangeLog @@ -1,3 +1,20 @@ +1999-11-30 Hugo Tyson <hmt@cygnus.co.uk> + + * src/common/kapi.cxx (cyg_scheduler_lock, cyg_scheduler_unlock): + assert good range for sched lock, and be defensive anyway. This + is in response to a long time taken to track down a "unlocked too + many times" bug. + +1999-11-24 Gary Thomas <gthomas@cygnus.co.uk> + + * tests/tm_basic.cxx: Size tests based on available resources, + using MLT files. Fall back if not available. + +1999-11-22 Nick Garnett <nickg@cygnus.co.uk> + + * src/sched/bitmap.cxx (Cyg_Scheduler_Implementation::add_thread): + Fixed typo in assertion, and moved it to a more useful place. + 1999-10-29 Gary Thomas <gthomas@cygnus.co.uk> * tests/PKGconf.mak: Enable cache tests for Cirrus Logic boards.
--- a/packages/kernel/current/src/common/kapi.cxx +++ b/packages/kernel/current/src/common/kapi.cxx @@ -108,12 +108,19 @@ externC void cyg_scheduler_start(void) externC void cyg_scheduler_lock(void) { Cyg_Scheduler::lock(); + // get_sched_lock() is unsigned, see below "cyg_ucount32 lock" + CYG_ASSERT( (0xff000000 & (Cyg_Scheduler::get_sched_lock())) == 0, + "Scheduler overlocked" ); } /* Unlock the scheduler. */ externC void cyg_scheduler_unlock(void) { - Cyg_Scheduler::unlock(); + cyg_ucount32 slock = Cyg_Scheduler::get_sched_lock(); + CYG_ASSERT( 0 < slock, "Scheduler not locked" ); + // And program defensively too: + if ( 0 < slock ) + Cyg_Scheduler::unlock(); } /*---------------------------------------------------------------------------*/
--- a/packages/kernel/current/src/sched/bitmap.cxx +++ b/packages/kernel/current/src/sched/bitmap.cxx @@ -99,14 +99,14 @@ void Cyg_Scheduler_Implementation::add_t { CYG_REPORT_FUNCTION(); + CYG_ASSERT((CYG_THREAD_MIN_PRIORITY >= thread->priority) + && (CYG_THREAD_MAX_PRIORITY <= thread->priority), + "Priority out of range!"); + CYG_ASSERT( thread_table[thread->priority] == NULL || thread_table[thread->priority] == thread, "Duplicate thread priorities" ); - CYG_ASSERT((CYG_THREAD_MIN_PRIORITY >= pri) - && (CYG_THREAD_MAX_PRIORITY <= pri), - "Priority out of range!"); - CYG_ASSERT( (run_queue & (1<<thread->priority)) == 0, "Run queue bit already set" );
--- a/packages/kernel/current/tests/tm_basic.cxx +++ b/packages/kernel/current/tests/tm_basic.cxx @@ -36,6 +36,7 @@ //####DESCRIPTIONEND#### #include <pkgconf/kernel.h> +#include <pkgconf/hal.h> #include <cyg/kernel/sched.hxx> #include <cyg/kernel/thread.hxx> @@ -50,6 +51,7 @@ #include <cyg/infra/testcase.h> #include <cyg/kernel/test/stackmon.h> +#include CYGHWR_MEMORY_LAYOUT_H // Define this to see the statistics with the first sample datum removed. // This can expose the effects of caches on the speed of operations. @@ -70,15 +72,34 @@ typedef struct fun_times { cyg_uint32 end; } fun_times; -#define NSAMPLES 32 +#define STACK_SIZE CYGNUM_HAL_STACK_SIZE_MINIMUM + +#ifdef CYGMEM_REGION_ram_SIZE +#define CYG_THREAD_OVERHEAD (STACK_SIZE+sizeof(cyg_thread)+(sizeof(fun_times)*2)) +#define NTEST_THREADS ((CYGMEM_REGION_ram_SIZE/8)/CYG_THREAD_OVERHEAD) +#define CYG_MUTEX_OVERHEAD (sizeof(cyg_mutex_t)+sizeof(fun_times)) +#define NMUTEXES ((CYGMEM_REGION_ram_SIZE/16)/CYG_MUTEX_OVERHEAD) +#define CYG_MBOX_OVERHEAD (sizeof(cyg_mbox)+sizeof(fun_times)) +#define NMBOXES ((CYGMEM_REGION_ram_SIZE/16)/CYG_MBOX_OVERHEAD) +#define CYG_SEMAPHORE_OVERHEAD (sizeof(cyg_sem_t)+sizeof(fun_times)) +#define NSEMAPHORES ((CYGMEM_REGION_ram_SIZE/16)/CYG_SEMAPHORE_OVERHEAD) +#define CYG_COUNTER_OVERHEAD (sizeof(cyg_counter)+sizeof(fun_times)) +#define NCOUNTERS ((CYGMEM_REGION_ram_SIZE/16)/CYG_COUNTER_OVERHEAD) +#define CYG_ALARM_OVERHEAD (sizeof(cyg_alarm)+sizeof(fun_times)) +#define NALARMS ((CYGMEM_REGION_ram_SIZE/16)/CYG_ALARM_OVERHEAD) +#else +// Defaults #define NTEST_THREADS 16 -#define NTHREAD_SWITCHES 128 #define NMUTEXES 32 #define NMBOXES 32 #define NSEMAPHORES 32 -#define NSCHEDS 128 #define NCOUNTERS 32 #define NALARMS 32 +#endif + +#define NSAMPLES 32 +#define NTHREAD_SWITCHES 128 +#define NSCHEDS 128 #define NSAMPLES_SIM 2 #define NTEST_THREADS_SIM 2 @@ -100,8 +121,6 @@ static int nscheds; static int ncounters; static int nalarms; -#define STACK_SIZE CYGNUM_HAL_STACK_SIZE_MINIMUM - static char stacks[NTEST_THREADS][STACK_SIZE]; static cyg_thread test_threads[NTEST_THREADS]; static cyg_handle_t threads[NTEST_THREADS]; @@ -167,6 +186,10 @@ void run_semaphore_circuit_test(void); void run_counter_tests(void); void run_alarm_tests(void); +#ifndef max +#define max(n,m) (m > n ? n : m) +#endif + // Wait until a clock tick [real time clock] has passed. This should keep it // from happening again during a measurement, thus minimizing any fluctuations void @@ -344,15 +367,15 @@ show_test_parameters(void) { disable_clock_latency_measurement(); diag_printf("\nTesting parameters:\n"); - diag_printf(" Clock samples: %3d\n", nsamples); - diag_printf(" Threads: %3d\n", ntest_threads); - diag_printf(" Thread switches: %3d\n", nthread_switches); - diag_printf(" Mutexes: %3d\n", nmutexes); - diag_printf(" Mailboxes: %3d\n", nmboxes); - diag_printf(" Semaphores: %3d\n", nsemaphores); - diag_printf(" Scheduler operations: %3d\n", nscheds); - diag_printf(" Counters: %3d\n", ncounters); - diag_printf(" Alarms: %3d\n", nalarms); + diag_printf(" Clock samples: %5d\n", nsamples); + diag_printf(" Threads: %5d\n", ntest_threads); + diag_printf(" Thread switches: %5d\n", nthread_switches); + diag_printf(" Mutexes: %5d\n", nmutexes); + diag_printf(" Mailboxes: %5d\n", nmboxes); + diag_printf(" Semaphores: %5d\n", nsemaphores); + diag_printf(" Scheduler operations: %5d\n", nscheds); + diag_printf(" Counters: %5d\n", ncounters); + diag_printf(" Alarms: %5d\n", nalarms); diag_printf("\n"); enable_clock_latency_measurement(); } @@ -1556,7 +1579,7 @@ run_all_tests(CYG_ADDRESS id) min_stack = STACK_SIZE; max_stack = 0; total_stack = 0; - for (i = 0; i < NTEST_THREADS; i++) { + for (i = 0; i < (int)NTEST_THREADS; i++) { for (j = 0; j < STACK_SIZE; j++) { if (stacks[i][j]) break; } @@ -1610,6 +1633,23 @@ void tm_basic_main( void ) nalarms = NALARMS; } + // Sanity +#ifdef WORKHORSE_TEST + ntest_threads = max(512, ntest_threads); + nmutexes = max(1024, nmutexes); + nsemaphores = max(1024, nsemaphores); + nmboxes = max(1024, nmboxes); + ncounters = max(1024, ncounters); + nalarms = max(1024, nalarms); +#else + ntest_threads = max(64, ntest_threads); + nmutexes = max(32, nmutexes); + nsemaphores = max(32, nsemaphores); + nmboxes = max(32, nmboxes); + ncounters = max(32, ncounters); + nalarms = max(32, nalarms); +#endif + new_thread(run_all_tests, 0); Cyg_Scheduler::scheduler.start();
--- a/packages/language/c/libm/current/ChangeLog +++ b/packages/language/c/libm/current/ChangeLog @@ -1,3 +1,8 @@ +1999-11-23 Hugo Tyson <hmt@cygnus.co.uk> + + * include/pkgconf/libm.h: Cooperate with permtest combo10 setting + an intermediate variable CYGNUM_LIBM_COMPAT_DEFAULT directly. + 1999-06-07 Jonathan Larmour <jlarmour@cygnus.co.uk> * src/mathincl/fdlibm.h: Fix for alias problem
--- a/packages/language/c/libm/current/include/pkgconf/libm.h +++ b/packages/language/c/libm/current/include/pkgconf/libm.h @@ -327,18 +327,21 @@ typedef enum { #undef CYGNUM_LIBM_COMPATIBILITY_XOPEN #undef CYGNUM_LIBM_COMPATIBILITY_SVID +#undef CYGNUM_LIBM_COMPAT_DEFAULT /* this is for permtest to find! */ -#if defined(CYGPKG_LIBM_COMPATIBILITY_DEFAULT) -# if defined(CYGNUM_LIBM_COMPATIBILITY_POSIX) -# define CYGNUM_LIBM_COMPAT_DEFAULT CYGNUM_LIBM_COMPAT_POSIX -# elif defined(CYGNUM_LIBM_COMPATIBILITY_IEEE) -# define CYGNUM_LIBM_COMPAT_DEFAULT CYGNUM_LIBM_COMPAT_IEEE -# elif defined(CYGNUM_LIBM_COMPATIBILITY_XOPEN) -# define CYGNUM_LIBM_COMPAT_DEFAULT CYGNUM_LIBM_COMPAT_XOPEN -# elif defined(CYGNUM_LIBM_COMPATIBILITY_SVID) -# define CYGNUM_LIBM_COMPAT_DEFAULT CYGNUM_LIBM_COMPAT_SVID -# else -# error Configuration broken - no default mode set +#ifndef CYGNUM_LIBM_COMPAT_DEFAULT +# if defined(CYGPKG_LIBM_COMPATIBILITY_DEFAULT) +# if defined(CYGNUM_LIBM_COMPATIBILITY_POSIX) +# define CYGNUM_LIBM_COMPAT_DEFAULT CYGNUM_LIBM_COMPAT_POSIX +# elif defined(CYGNUM_LIBM_COMPATIBILITY_IEEE) +# define CYGNUM_LIBM_COMPAT_DEFAULT CYGNUM_LIBM_COMPAT_IEEE +# elif defined(CYGNUM_LIBM_COMPATIBILITY_XOPEN) +# define CYGNUM_LIBM_COMPAT_DEFAULT CYGNUM_LIBM_COMPAT_XOPEN +# elif defined(CYGNUM_LIBM_COMPATIBILITY_SVID) +# define CYGNUM_LIBM_COMPAT_DEFAULT CYGNUM_LIBM_COMPAT_SVID +# else +# error Configuration broken - no default mode set +# endif # endif #endif