changeset 658:ddc030bc26c9

iq80321 PCI tweak
author msalter
date Sat, 22 Feb 2003 16:52:08 +0000
parents 02afed4f500a
children 007ddf4d1979
files packages/hal/arm/xscale/iq80321/current/ChangeLog packages/hal/arm/xscale/iq80321/current/src/iq80321_pci.c
diffstat 2 files changed, 8 insertions(+), 1 deletions(-) [+]
line wrap: on
line diff
--- a/packages/hal/arm/xscale/iq80321/current/ChangeLog
+++ b/packages/hal/arm/xscale/iq80321/current/ChangeLog
@@ -1,3 +1,7 @@
+2003-02-22  Mark Salter  <msalter@redhat.com>
+
+	* src/iq80321_pci.c (cyg_hal_plf_pci_init): Make BAR0 non-prefetchable.
+
 2003-02-12  Mark Salter  <msalter@redhat.com>
 
 	* include/iq80321.h: Fix battery defines.
--- a/packages/hal/arm/xscale/iq80321/current/src/iq80321_pci.c
+++ b/packages/hal/arm/xscale/iq80321/current/src/iq80321_pci.c
@@ -8,7 +8,7 @@
 //####ECOSGPLCOPYRIGHTBEGIN####
 // -------------------------------------------
 // This file is part of eCos, the Embedded Configurable Operating System.
-// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
 //
 // eCos is free software; you can redistribute it and/or modify it under
 // the terms of the GNU General Public License as published by the Free
@@ -125,6 +125,9 @@ cyg_hal_plf_pci_init(void)
 
     hal_pci_inbound_window_mask = ~dram_limit;
 
+    // Force BAR0 to be non-prefetchable to allow proper MU usage
+    *ATU_IABAR0 &= ~CYG_PRI_CFG_BAR_MEM_PREFETCH;
+
 #ifdef CYG_HAL_STARTUP_ROM
 #ifdef CYGSEM_HAL_ARM_IQ80321_CLEAR_PCI_RETRY
     if (!hal_pcsr_cfg_retry || !cyg_hal_plf_wait_for_bios())