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annotate packages/hal/common/current/tests/cache.c @ 64:c38311975d4f ecos-sw-2000-01-28

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Merge from eCos master repository on 2000-01-28-04:28:11-GMT
author jlarmour
date Fri, 28 Jan 2000 04:59:39 +0000
parents a0774359f013
children bf00f99aec69
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1 /*=================================================================
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2 //
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3 // cache.c
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4 //
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5 // HAL Cache timing test
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6 //
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7 //==========================================================================
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8 //####COPYRIGHTBEGIN####
64
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9 //
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10 // -------------------------------------------
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11 // The contents of this file are subject to the Red Hat eCos Public License
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12 // Version 1.0 (the "License"); you may not use this file except in
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13 // compliance with the License. You may obtain a copy of the License at
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14 // http://sourceware.cygnus.com/ecos
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15 //
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16 // Software distributed under the License is distributed on an
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17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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18 // License for the specific language governing rights and limitations under
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19 // the License.
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20 //
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21 // The Original Code is eCos - Embedded Configurable Operating System,
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22 // released September 30, 1998.
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23 //
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24 // The Initial Developer of the Original Code is Red Hat.
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25 // Portions created by Red Hat are
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26 // Copyright (C) 1998, 1999, 2000 Red Hat, Inc.
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27 // All Rights Reserved.
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28 // -------------------------------------------
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29 //
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30 //####COPYRIGHTEND####
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31 //==========================================================================
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32 //#####DESCRIPTIONBEGIN####
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33 //
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34 // Author(s): dsm
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35 // Contributors: dsm, nickg
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36 // Date: 1998-06-18
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37 //####DESCRIPTIONEND####
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38 */
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39
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40 #include <pkgconf/hal.h>
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41
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42 #include <cyg/infra/testcase.h>
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43
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44 #include <cyg/hal/hal_cache.h>
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45 #include <cyg/hal/hal_intr.h>
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46 #include <cyg/infra/diag.h>
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47
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48 #if (HAL_DCACHE_SIZE > 0)
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49
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50 // -------------------------------------------------------------------------
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51 // If the HAL does not supply this, we supply our own version
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52
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53 #ifdef HAL_DCACHE_SYNC
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54
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55 # define HAL_DCACHE_PURGE_ALL() HAL_DCACHE_SYNC()
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56
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57 #else
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58
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59 static cyg_uint8 dca[HAL_DCACHE_SIZE + HAL_DCACHE_LINE_SIZE*2];
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60
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61 #define HAL_DCACHE_PURGE_ALL() \
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62 CYG_MACRO_START \
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63 volatile cyg_uint8 *addr = &dca[HAL_DCACHE_LINE_SIZE]; \
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64 volatile cyg_uint8 tmp = 0; \
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65 int i; \
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66 for( i = 0; i < HAL_DCACHE_SIZE; i += HAL_DCACHE_LINE_SIZE ) \
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67 { \
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68 tmp = addr[i]; \
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69 } \
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70 CYG_MACRO_END
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71
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72 #endif
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73
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74 // -------------------------------------------------------------------------
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75
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76 #ifndef MAX_STRIDE
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77 #define MAX_STRIDE 64
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78 #endif
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79
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80 volatile char m[(HAL_DCACHE_SIZE/HAL_DCACHE_LINE_SIZE)*MAX_STRIDE];
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81
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82 // -------------------------------------------------------------------------
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83
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84 static void time0(register cyg_uint32 stride)
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85 {
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86 register cyg_uint32 j,k;
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87 register char c;
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88
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89 diag_printf("stride=%d\n", stride);
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90
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91 k = 0;
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92 if ( cyg_test_is_simulator )
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93 k = 3960;
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94
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95 for(; k<4000;k++) {
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96 for(j=0; j<(HAL_DCACHE_SIZE/HAL_DCACHE_LINE_SIZE); j++) {
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97 c=m[stride*j];
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98 }
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99 }
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100 }
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101
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102 // -------------------------------------------------------------------------
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103
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104 void time1(void)
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105 {
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106 cyg_uint32 i;
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107
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108 for(i=1; i<=MAX_STRIDE; i+=i) {
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109 time0(i);
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110 }
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111 }
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112
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113 // -------------------------------------------------------------------------
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114 // This test could be improved by counting number of passes possible
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115 // in a given number of ticks.
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116
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117 static void entry0( void )
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118 {
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119 register CYG_INTERRUPT_STATE oldints;
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120
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121 #ifdef HAL_CACHE_UNIFIED
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122
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123 HAL_DISABLE_INTERRUPTS(oldints);
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124 HAL_DCACHE_PURGE_ALL(); // rely on above definition
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125 HAL_UCACHE_INVALIDATE_ALL();
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126 HAL_UCACHE_DISABLE();
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127 HAL_RESTORE_INTERRUPTS(oldints);
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128 CYG_TEST_INFO("Cache off");
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129 time1();
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130
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131 HAL_DISABLE_INTERRUPTS(oldints);
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132 HAL_DCACHE_PURGE_ALL(); // rely on above definition
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133 HAL_UCACHE_INVALIDATE_ALL();
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134 HAL_UCACHE_ENABLE();
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135 HAL_RESTORE_INTERRUPTS(oldints);
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136 CYG_TEST_INFO("Cache on");
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137 time1();
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138
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139 #else // HAL_CACHE_UNIFIED
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140
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141 HAL_DISABLE_INTERRUPTS(oldints);
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142 HAL_DCACHE_PURGE_ALL();
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143 HAL_ICACHE_INVALIDATE_ALL();
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144 HAL_DCACHE_INVALIDATE_ALL();
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145 HAL_ICACHE_DISABLE();
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146 HAL_DCACHE_DISABLE();
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147 HAL_RESTORE_INTERRUPTS(oldints);
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148 CYG_TEST_INFO("Dcache off Icache off");
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149 time1();
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150
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151 HAL_DISABLE_INTERRUPTS(oldints);
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152 HAL_DCACHE_PURGE_ALL();
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153 HAL_ICACHE_INVALIDATE_ALL();
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154 HAL_DCACHE_INVALIDATE_ALL();
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155 HAL_ICACHE_DISABLE();
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156 HAL_DCACHE_ENABLE();
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157 HAL_RESTORE_INTERRUPTS(oldints);
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158 CYG_TEST_INFO("Dcache on Icache off");
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159 time1();
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160
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161 HAL_DISABLE_INTERRUPTS(oldints);
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162 HAL_DCACHE_PURGE_ALL();
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163 HAL_ICACHE_INVALIDATE_ALL();
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164 HAL_DCACHE_INVALIDATE_ALL();
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165 HAL_ICACHE_ENABLE();
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166 HAL_DCACHE_DISABLE();
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167 HAL_RESTORE_INTERRUPTS(oldints);
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168 CYG_TEST_INFO("Dcache off Icache on");
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169 time1();
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170
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171 HAL_DISABLE_INTERRUPTS(oldints);
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172 HAL_DCACHE_PURGE_ALL();
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173 HAL_ICACHE_INVALIDATE_ALL();
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174 HAL_DCACHE_INVALIDATE_ALL();
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175 HAL_ICACHE_ENABLE();
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176 HAL_DCACHE_ENABLE();
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177 HAL_RESTORE_INTERRUPTS(oldints);
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178 CYG_TEST_INFO("Dcache on Icache on");
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179 time1();
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180
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181 HAL_DISABLE_INTERRUPTS(oldints);
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182 HAL_DCACHE_PURGE_ALL();
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183 HAL_ICACHE_INVALIDATE_ALL();
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184 HAL_DCACHE_INVALIDATE_ALL();
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185 HAL_ICACHE_DISABLE();
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186 HAL_DCACHE_DISABLE();
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187 HAL_RESTORE_INTERRUPTS(oldints);
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188 CYG_TEST_INFO("Dcache off Icache off");
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189 time1();
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190
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191 #endif // HAL_CACHE_UNIFIED
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192
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193 CYG_TEST_PASS_FINISH("End of test");
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194 }
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195
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196 // -------------------------------------------------------------------------
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197
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198 void cache_main( void )
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199 {
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200 CYG_TEST_INIT();
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201
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202 entry0();
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203
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204 }
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205
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206 // -------------------------------------------------------------------------
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207
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208 externC void
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209 cyg_start( void )
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210 {
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211 cache_main();
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212 }
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213
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214 #else // (HAL_DCACHE_SIZE > 0)
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215 #define N_A_MSG "No cache"
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216 #endif // (HAL_DCACHE_SIZE > 0)
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217
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218 #ifdef N_A_MSG
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219 externC void
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220 cyg_start( void )
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221 {
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222 CYG_TEST_INIT();
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223 CYG_TEST_NA( N_A_MSG );
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224 }
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225 #endif // N_A_MSG
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226
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227 // -------------------------------------------------------------------------
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228 /* EOF cache.c */